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Interview with Informatique News (France)

April 9, 2019

Une interview de Carlos Mazure, CTO de SOITEC et Président du SOI Industry Consortium

Une interview de Jean-Éric Michallet, responsable du département micro-électronique du LETI

Big Win for FD-SOI: Sony GPS in Huami/Xiaomi Smartwatch (EETimes)

Sony’s 28nm FD-SOI GPS rolling out in the Xiaomi Amazfit smartwatch is “…a big win for Sony” and “…an even bigger win for FD-SOI’s promoters,” said Junko Yoshida of EETimes (see Sony-Inside Huami Watch: Is It Time for FD-SOI?). Then she adds:Huami’s watch decidedly demonstrates the technology’s claim to ultra-low power consumption.”

Xiaomi is a subsidiary of Huami, which lays claim to being the second largest manufacturer of wearables in the world. So it really is a big win. What’s more, the Amazfit, says Xiaomi, is “…the world’s first smartwatch with a 28 nm GPS sensor”.

Sony has been releasing evolving details of the chip at various conferences over the last few years (including SOI Consortium forums). To get their ISSCC paper, 26.5 A 0.7V 1.5-to-2.3mW GNSS receiver with 2.5-to-3.8dB NF in 28nm FD-SOI (February 2016) from IEEE Xplore – click here.

amazfit1fdsoi

(Image courtesy xiaomi-mi.com)

GF’s 12nm FD-SOI With Back Bias Beats 10nm FinFET Performance (EETimes)

With back bias,12nm FD-SOI beats 10nm FinFET on performance. This excellent news comes in by way of Peter Clarke of EETimes Europe (read the whole article here). Rutger Wijburg, GM of GloFo’s Dresden fab told him, “If you look at performance with back-bias 22FDX is the same or better than 16/14nm FinFET process. With 12FDX with back bias you get better than 10nm FinFET processes.”

Use 28nm FD-SOI, Samsung advises new customers and designers (SemiEngineering)

“We intend to focus all new engagements in design using 28nm FD-SOI,” Samsung Semi’s Kelvin Low told SemiEngineering’s Mark Lapedus in a recent article (read it here).

Low, who’s senior directory of the company’s foundry marketing says they’ll of course continue to support existing 28nm bulk customers, “But we think FD-SOI has enough benefits to attract new customers and designers.”

 

New Chips and Design Wins for RF-SOI Pioneer Peregrine Semi

From RF-SOI pioneer Peregrine Semi comes a steady stream of new chips and design wins.

News include:

  • Two UltraCMOS® MPAC–Doherty products—the PE46130 and PE46140 (press release here). These monolithic phase and amplitude controllers (MPAC) join the PE46120 in offering maximum phase-tuning flexibility for Doherty power amplifier (PA) optimization. Designed for the LTE and LTE-A wireless-infrastructure transceiver market, the MPAC–Doherty product family now extends from 1.8 to 3.8 GHz with three separate, pin-compatible parts.
  • Design wins: Psemi’s high-linearity RF switches are designed into multiple DOCSIS 3.1 certified cable modems (press release here). CableLabs, the research and development consortium that develops the DOCSIS specification, has certified the first DOCSIS 3.1 cable modems. Of the certified modems, Peregrine Semiconductor’s RF switches—the UltraCMOS® PE42722 and PE42723—are designed into the cable modems that feature a band-select feature. The PE42722 and PE42723 are the only RF switches that enable dual upstream/downstream bands to reside in the same consumer premise equipment (CPE) device.
  • PSemi_RFSOI_productofyr

    Electronic Products magazine named Peregrine Semiconductor’s UltraCMOS® PE42020 True DC RF switch a 2015 “Product of the Year.”

    Psemi was honored with a 2015 Electronic Products “Product of the Year” award for its UltraCMOS® PE42020 True DC RF switch, the industry’s first and only RF integrated switch to operate from DC (0 Hz) to 8 GHz. (Press release here.)

  • Psemi RF engineer Tero Ranta recently wrote a chapter summarizing the technical details behind how you use SOI CMOS for impedance tuning for the book “Tunable RF Components and Circuits—Applications in Mobile Handsets.” In an interview for Psemi’s SOI University, he said, “…the main point is that you can improve the performance of mobile devices by using tuning. And you can do it by using SOI technology, which is what we use at Peregrine.” He adds, “… there are many other places in the 4G and 5G smartphone RF front-ends that will require tuning going forward to optimize system performance.”

 

Implementing ARM Cortex A-series in 22nm FD-SOI – GloFo tech webinar

GloFo_FDSOI_22FDX_ARMCortexA_webinarRegistration is open for GlobalFoundries’ technical webinar, “How to Implement an ARM Cortex-A17 Processor in 22FDX 22nm FD-SOI Technology” (click here to go to the registration page). The webinar will cover the optimal steps to successfully implement ARM® Cortex®-A Series* processors using 22FDXTM 22nm FD-SOI technology.

GF Design Enablement Fellow Dr. Joerg Winkler will address:

  • Differentiated features of 22FDX including body-bias
  • Digital implementation flow using the Cadence tool suite
  • Initial 22FDX power-performance-area (PPA) results of an ARM Cortex sub-module
  • Understanding implementation details and results

This webinar will take place April 26, 2016 at10:00 am Pacific Time.

BTW, GF’s already done quite a few 22FDX-related webinars and videos – click here to see the current list.

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* Per ARM, “Cortex-A processors are specifically designed to execute complex functions and applications such as those required by consumer devices like smartphones and tablets. Their performance efficiency is also making them an increasingly popular choice for servers and enterprise applications where large core clusters can be combined for optimal solutions.”

GF’s New RF-SOI PDK Simplifies Design for Smartphones, IoT

GFrfsoi-icon-newGlobalFoundries recently announced availability of a new set of RF-SOI PDKs for the company’s 7SW SOI technology. GF, which has now delivered more than 20 billion RF-SOI chips for the world’s smartphones, tablets and more, notes that its 7SW SOI technology is optimized for multi-band RF switching in next-generation smartphones. It is also poised to drive innovation in IoT applications.

The new PDKs feature an interoperable co-design flow to help chip designers improve design efficiency and deliver differentiated RF-SOI front-end solutions in increasingly sophisticated mobile devices. (See press release here.) The new PDKs are designed to use with Keysight Technologies’ (formerly Agilent) Advanced Design System (ADS) EDA software, so designers can edit their designs in ADS using a single Si2 OpenAccess database without any interference.

“Our 7SW platform, with superior LNA, switch devices, and trap-rich substrates, offer improved devices reception, interference rejection, and battery life for fewer dropped calls and longer talk time,” said Peter Rabbeni, senior director of RF product marketing and business development at GlobalFoundries. “Our RF-SOI technology has gained significant industry traction for cellular front-end module applications, and the new RFIC interoperability feature will allow us to provide our 7SW customers additional design flexibility with a single PDK.”

Shanghai & Grenoble tech dev powerhouses team up on SOI for IoT in China and global innovation ecosystem

LetiLogo MinatecLogo SITRI-LOGO-EN-2Three of the world’s More-than-Moore and SOI technology development powerhouses have signed a comprehensive agreement for ongoing collaboration and cooperation in developing new technologies for the emerging IoT market. SITRI of Shanghai, and CEA-Leti and Minatec of Grenoble will work together to accelerate the adoption of their latest technologies and create a global innovation ecosystem for emerging IoT applications (read the press release here).

The framework agreement broadly covers all joint areas of research at SITRI and Leti, including MEMS and sensors, 5G RF front ends, ultra-low power computing and communication, RF-SOI and FD-SOI.

In fact, the trio cites SOI as a key technology in the development of both Moore’s Law and “More than Moore” solutions for the IC industry, as it brings cost, performance, power and integration advantages to the areas of ICs, RF, MEMS, and communications.

“We are confident that this collaboration will be positive for China’s electronics industry, as well as for the Grenoble region’s growing SOI technology ecosystem,” said MINATEC Director Jean-Charles Guibert.

Adds Marie-Noëlle Semeria, CEO of Leti, “Through this partnership, SITRI, MINATEC, CEA-Leti and the entire ecosystem will be able to promote and extend this ecosystem to SOI partners worldwide, and provide SOI solutions to the emerging Chinese IoT market.”

“MINATEC is a world-class international innovation center that fosters a wide range of leading-edge IoT technology research and development which is home to CEA-Leti, the renowned international research institute in microelectronics,” said Charles Yang, President of SITRI. “Through this agreement and SITRI’s established platform for ‘More than Moore’ commercialization, we can accelerate the adoption of these latest technologies and create a global innovation ecosystem for emerging IoT applications.”

Reminder re: top SOI Conference – IEEE S3S ’16 (SOI/3D/SubVt) CFP deadline April 15th. Keynotes: NXP, Skyworks, Qualcomm

S3SconflogoDon’t forget to get your paper submitted to the top conference with a major focus on the SOI ecosystem: the IEEE S3S (SOI/3D/SubVt). The Call For Papers (CFP) deadline is April 15, 2016. As we noted for you in ASN back in December, the theme of the conference, which will take place October 10th – 13th in San Francisco, is “Energy Efficient Technology for the Internet of Things”.

As of this writing, the following keynote speakers have been confirmed:

  • Ron Martino, NXP : “Advanced Innovation and Requirements for Future Smart, Secure and Connected Applications”
  • Peter Gammel, Skyworks : “RF front end requirements and roadmaps for the IoT”
  • Nick Yu, Qualcomm : topic TBAieee_logo_mb_tagline

Invited speakers include:

  • Jamie Schaffer, GlobalFoundries : topic TBA
  • Philippe Flatresse, ST Microelectronics : “Body bias and FDSOI for Automotive”
  • Akram Salman, Texas Instruments : “ESD for advanced digital and analog technologies”
  • Xavier Garros, CEA-Leti : “Reliability of FDSOI”

As always, there will be a Best Paper Award and a Best Student Paper Award. But students take note: the recipient of the Best Student Paper will also receive $1000 from Qualcomm.

Papers related to technology, devices, circuits and applications (more details here) in the following areas are requested :

  • SOI
  • 3D Integration
  • Subthreshold MicroelectronicsEDS-Logo-Reflex-Blue-e1435737971222

For current information on the conference visit the S3S website at: http://s3sconference.org/

LinkedIn users will also want to join the conference group at IEEE SOI-3D-Subthreshold Microelectronics Technology (S3S) Unified Conference.