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Leading Silicon Wafer Supplier Expands Silicon-on Insulator Ecosystem

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Boston, MA, March 16, 2010 – The SOI Industry Consortium, aimed at accelerating silicon-on-insulator (SOI) innovation across broad markets, announced today that MEMC Electronic Materials, Inc. (NYSE: WFR) has joined the worldwide organization. MEMC is a global leader in the manufacture and sales of semiconductor materials, including SOI, partially depleted SOI, fully depleted SOI, strained SOI and other SiGe-on-insulator subtrates offerings. The addition of MEMC, which has a fifty-year history pioneering wafer technologies, expands opportunities for the SOI ecosystem to ensure alignment between suppliers and users.
“MEMC brings a track record of silicon wafer innovations and technological advances that improve semiconductor performance and manufacturing yields," said Dr. Srikanth Kommu , Director of SOI R&D at MEMC Electronics Materials, Inc. “We look forward to collaborative relationships with other members of the SOI Industry Consortium, which will benefit the fast-growing base of SOI users across the industry.”
“We are extremely pleased to have MEMC join us,”said Horacio Mendez, executive director of the SOI Industry Consortium. “As a leading supplier of silicon wafer technologies, MEMC brings valuable expertise to our ecosystem of companies and help ensure alignment in this time of SOI market acceleration.”
The SOI Industry Consortium welcomes companies, organizations, government and academic institutions to join the group in applying the full benefits of SOI-based electronics to global sustainability challenges, lowering the total cost-of-ownership of electronics and improving the quality of life.
About the SOI Industry Consortium:
The SOI Industry Consortium is chartered with accelerating silicon-on-insulator (SOI) innovation into broad markets by promoting the benefits of SOI technology and reducing the barriers to adoption. Representing innovation leaders from the entire electronics industry infrastructure, current SOI Industry Consortium members include: AMD, Applied Materials, ARM, Cadence Design Systems, CEA-Léti, Freescale Semiconductor, GLOBALFOUNDRIES, IBM, IMEC, Infotech, Innovative Silicon, Kanazawa Institute of Technology , KLA-Tencor, Magma Design, MEMC, Mentor Graphics, MIT Lincoln Laboratories, Nvidia, Ritsumeikan University, Samsung, Semico, SEH Europe, Soitec, Stanford University, STMicroelectronics, Synopsys, Tyndall Institute, University of California-Berkeley, University Catholique de Louvain, UMC and Varian. Membership is open to all companies and institutions throughout the electronics industry. For more information, please visit www.soiconsortium.org.
Press Contact:
Jeff Wolf
+1 925 454 9171
jeff.wolf@soiconsortium.org
Legal Note
The views and opinions expressed by the SOI Industry Consortium through officers in the SOI Industry Consortium or in this presentation or other communication vehicles are not necessarily representative of the views and opinions of individual members. Officers of the SOI Industry Consortium speaking on behalf of the Consortium should not be considered to be speaking for the member company or companies they are associated with, but rather as representing the views of the SOI Industry Consortium. Views and opinions are also subject to change without notice, and the SOI Industry Consortium assumes no obligation to update the information in this communication or accompanying discussions.
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texte [Chipestimate.tv]
[by Harry Gries, ASIC Methodology and EDA Technology Consultant]