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IBM, STM, Hitachi, Leti, Soitec on FD-SOI
Special supplement: SOI Industry Consortium
Medical apps: KEK, Hitachi, UCL, Nanosens
IEEE fellows, Industry Buzz and more

Download the presentations of the October 21, 2009 conference.
Introduction (pdf, 0.9 MB)
by Horacio Mendez, SOI Industry Consortium
SOI Fundamentals (pdf, 0.4 MB)
by Bob Ulicki, SOI Industry Consortium
Designing Low Power Circuits on SOI (pdf, 2.1 MB)
by Olivier Thomas, CEA-Leti
Designing High Performance Microprocessors on SOI (pdf, 0.9 MB)
by Nghia Phan, IBM
SOI Design Tools, Flows and Methodologies for RF and Mixed Signal ICs (pdf, 3.0 MB)
by Jim McMahon, Cadence
SOI Design Tools, Flows and Methodologies for Digital ICs (pdf, 4.0 MB)
by Michael Jacobs and Trisha Kristof, Cadence
White paper on Silicon On Insulator (SOI) implementation [Infotech Enterprises Ltd.]
Roadmap for nanometer ultra-low-power digital circuits based on sub/near-threshold CMOS logic [UC Louvain]
texte [Chipestimate.tv]
[by Harry Gries, ASIC Methodology and EDA Technology Consultant]