Tag Archive Infineon

ByGianni PRATA

GF, NXP, Infineon and more at SOI Workshop During Silicon Saxony Day (Dresden, 7 July 2015)


Silicon Europe (an alliance of Europe’s leading micro- and nanoelectronics clusters) and the SOI Consortium have organized an SOI Workshop on the 7th of July 2015, during the 10th Silicon Saxony Day in Dresden.

Here’s the agenda:

  • Quick Introduction
  • More than Moore Market Analysis and Opportunities (Yole)
  • Power SOI and applications (NXP)
  • Foundry offer (GlobalFoundries)
  • FD-SOI status review (Giorgio Cesana, SOI Consortium)
  • Analog/RF, sensors and MEMS in SOI: demos and performance assessment (Denis Flandre, UCL)
  • Automotive IC needs (Infineon)

The workshop, which runs from 1:30 – 4:30, will be held in English. There is an entry fee (waived for students) for Silicon Saxony Day, but once you’re in, the SOI Workshop is free.


Semicon Europa ’14 (Grenoble, 7-9 October) Includes Top Speakers at Conferences on Low Power, 3DI, Power Electronics & more

(Image courtesy: SEMI)


For the first time ever, Semicon Europa will be held in Grenoble this year, and FD-SOI will be a major part of it (website link here). With more than 5000 visitors and 350 exhibitors, Semicon Europa is the greatest annual event for the European microelectronics industry.

And Grenoble can fairly be considered the epicenter of all things SOI: it really took off when Leti researcher Michel Bruel invented the Smart CutTM technology there for manufacturing SOI wafers in the early 1990’s. That was then spun off to Soitec up the road, and the rest is history in the making. In fact, Forbes recently recognized Grenoble as one of the Top 5 Most Inventive Cities in the world.

So from now on, Semicon Europa will alternate between Dresden, Germany (home to GlobalFoundries’ fabs) and Grenoble, France.

Happily this is coinciding with an industry upturn, so Semi’s signed up 25% more exhibitors than last year. In addition to the exhibition floor, the 3-day event will also host over 300 speakers at over 70 conferences and more than 100 hours of technology sessions and presentations. This is no longer your quiet Euro-equipment show – this is a dynamic happening covering the entire supply chain, with a big emphasis on innovation and applications.

For those attending the popular Fab Managers Forum, the opening keynote will be made by Soitec founder and CEO André-Jacques Auberton-Hervé. In addition to heading up the world’s largest SOI wafer manufacturer, Dr. Auberton-Hervé is a member of the EC’s High-Level Group on Key Enabling Technologies (KET) and of the Electronic Leaders Group (ELG), which is in charge of implementing the European Union’s “10/100/20” strategy (they’re looking to leverage €10 Billion Public/Private Funding for a €100 Billion investment from industry for manufacturing to capture 20% of the semiconductor market value for Europe by 2020). As we reported here in ASN earlier this year, SOI-based apps are an important part of all this.

In the abstract for his Semicon presentation, Dr. Auberton-Hervé indicates he’ll describe the ELG implementation plan focused on demand accelerators (IoT, mobile convergence), supply chain strengthening, and an enhanced framework development across Europe. The Pilot Lines initiative was started in 2012, and industry is ready to invest now, he notes, with 5 pilot lines in progress, and numerous projects submitted. He’ll highlight how manufacturing performance is key in the European semiconductor industry, from materials and equipment to components design and wafer production.


FD-SOI at the Semicon Europa Low Power Conference

The key Semicon Europa event for the FD-SOI ecosystem will be The Low Power Conferencewhich features a cast of heavy hitters (abstracts for the talks and speaker bios are available here.) It kicks off on Tuesday afternoon (7 September) with a market analysis by ST COO Jean-Marc Chery, exploring solutions for mobile to servers and IoT.

Next up, Manfred Horstmann, GlobalFoundries’ Director of Products and Integration in Dresden will focus on SOCs for at 28/20nm. He’s using the term “ET-SOI” with BB (back bias) options. The ET stands for Extremely Thin SOI – it’s the term IBM first used for FD-SOI, but the two terms are now used seemingly interchangeably. As Horstmann notes in the conference abstract, “Being a planar device, ET-SOI devices allow the continuation of previous nodes manufacturing and design experience. Vt-tunability and low GIDL currents are a clear advantage of ET-SOI BB devices for SoC applications, too.” He’ll conclude with an outlook on FinFETs.

Thomas Skotnicki Fellow and Director of Advanced Devices at STMicroelectronics and all around giant of FD-SOI (and in particular ST’s flavor: ultra-thin box and body aka UTBB) has what sounds like a groundbreaking IoT talk. Beyond FD-SOI, he’ll cover how the technology will be used in conjunction with energy harvesting, storage, power management, sensors and MEMS. He’s got a low-power mobile app example to show us, too.

Other talks include imec on FinFETs, Imagination Technology on MIPS, Qualcomm on the “Landscape for More Moore”, and Leti on FD-SOI and 3D stacking for multicore embedded systems.

Renesas will detail their flavor of FD-SOI, which they’ve been working on for a long time (especially with innovations from Hitachi). They call it Silicon-on-Thin-Buried Oxide, aka SOTB.

David Jacquet of ST will address design, showing among other things how FD-SOI opens the way to new opportunities like Wide DVFS and dynamic leakage management. He’ll be detailing the key IP for implementing those technologies. (He’s got a great video on FD-SOI design techniques, btw – click here for more on that.)

Soitec CTO Carlos Mazure will cover the range of substrate solutions for devices across the mobile space, including RF, FD-SOI and SOI FinFET.

Wednesday morning, the conference continues with more from ST, and a must-see talk on FD-SOI and IoT costs and projections by Handel Jones of IBS. (If you’ve missed his excellent pieces here in ASN, you’ll find them all here.)

The rest of the afternoon will focus on design tools and applications, with talks from Cadence, ANSYS, Docea, HP (two talks from them), Ericsson, Schneider and Sorin (medical devices).

ASN will be there – follow us on Twitter for live coverage – and we’ll bring you more details of the key talks in the weeks to come.


Power and 3DI

A couple of other last notes if you’re planning a trip to Semicon Europa. On Wednesday afternoon (8 September), a 3D Integration Session (details here) will cover recent updates on 3D circuit and process technologies. Following an introduction by Ionut Radu, Soitec Senior Scientist, speakers from TSMC, imec, Leti, EV Group, Entegris, Fujifilm and Rockwood will address the status of 3D circuits, including 3D TSV and monolithic 3D integration schemes, manufacturing challenges and readiness for application specific systems.

Another terrific Semicon Europa event for the advanced substrates community will be the Power Electronics Conference: the ultimate path to CO2 reduction. Topics cover GaN, GaN-on-Si, SiC and SOI. Renault, Leti, Schneider Electric, ST, Infineon, Yole, Fairchild, and Siltronic will be presenting, as well as Arnaud Rigny of Soitec, who’ll will give a talk on smart substrates for smart power. This all takes place on Wednesday and Thursday, the 8th and 9th of September. Details can be found here.

Hope to see you in Grenoble!

ByGianni PRATA

White Goods Get Greener

According to the US Department of Energy, appliances account for about 17% of a household’s energy consumption. Major appliances like refrigerators and clothes washers and dryers are at the top of the consumption list.

With programs like Energy Star helping consumers understand that the operating cost is just as important a consideration as the price tag, manufacturers are rising to the energy consumption challenge.

For several years now, Infineon, the world market leader in semiconductor discretes and modules for power electronics, has used SOI to help product designers tackle one of the biggest energy challenges in major appliances: motor control. (For more about this SOI-based technology, see Infineon’s article in ASN#7)

Now, the energy efficiency of Infineon’s SOI-based power products is at the heart of a new joint venture with LS Industrial Systems. Announced in June of this year, the LS Power Semitech Co., Ltd. JV will focus on the development, production and marketing of energy-efficient molded power modules for major household appliances, known in the trade as white good applications.

SOI in control

The SOI-enabled CIPOS™ (Control Integrated Power System) modules are designed to enable more energy-efficient operation of such consumer appliances as washing machines, refrigerators and air conditioners. The external dimensions for the RoHS-compliant package shown here are 50.4mm x 30.2mm. (Courtesy: Infineo

Infineon will provide the joint venture with licenses to IP as well as technology and process know-how on its power module family CIPOS™ (Control Integrated Power System). CIPOS power modules increase the energy efficiency and reliability of home appliance motors. For an appliance designer, this can eliminate as many as 23 discrete components compared to a design based on discrete components.

The CIPOS modules incorporate a three-phase inverter power stage with an SOI gate driver, bootstrap diodes and capacitors, and auxiliary circuitry in a compact, high-performance, fully isolated package.

The SOI-based gate driver is the critical link between the control system and the power system. The driver IC takes a logic signal output from a microcontroller chip in the control system, and provides the appropriate current and voltage to turn power devices on and off. As such, it has to be extremely robust, yet very cost-competitive.

2010 volume launch

Infineon and LS Industrial Systems indicate that the establishment of the joint venture paves the way for them to more rapidly access the promising market for energy efficient household appliances, and also for other low-power consumer and standard industrial applications.

The LS Power Semitech Co., Ltd. JV headquarters and manufacturing site is in Cheonan, south of Seoul. The parent companies say they will closely cooperate in terms of marketing, international sales, and new product developments. Mass production of the CIPOS modules begins in Cheonan in January 2010.

For LS Industrial Systems, this SOI-enabled JV is a perfect fit for its global, “Low Carbon, Green Growth” strategy.

ByGianni PRATA

CiPoS, a new SOI-based family of highly integrated intelligent power modules

CiPoS, a new SOI-based family of highly integrated intelligent power modules from Infineon eliminates as many as 23 discrete components. The modules are designed to improve energy efficiency of electrical drives in consumer appliances such as washing machines and air conditioners, offering efficiencies of up to 94%.

Infineon’s CiPoS™ power module (Courtesy: Infineon)


The Driving Force

Infineon’s cost-effective SOI technology for driver ICs helps major appliance designers meet stringent energy and reliability parameters.

Infineon is using SOI to help tackle one of the biggest challenges faced by designers of major appliances like washing machines, refrigerators and air conditioners: motor control. Read More

ByGianni PRATA

Industry SOI Innovators in Core Group Guiding Massive European Nanoelectronics Initiative

Eight key industrial players in nanoelectronics have created the legal entity for partnering with the EC’s €3 billion Joint Technology Initiative.

With the legalities now in place, the greater nanoelectronics community is set to play a significant role in defining the future of nanoelectronics R&D in Europe. Read More

ByGianni PRATA

ATDF MuGFET Development Program

In January of this year, Soitec announced its participation as the SOI substrate supplier in an ATDF development program focusing on multi-gate field effect transistor (MuGFET) technology for the 45-nm node and below. Soitec has now presented joint papers with Texas Instruments and Infineon Technologies at various technical conferences on MuGFETs, which are promising non-planar CMOS transistors that improve performance and minimize current leakage •