Tag Archive networking

It’s Official! GlobalFoundries Launches 22FDX: 22nm FD-SOI in 4 flavors

With much fanfare, GlobalFoundries has officially announced its 22nm FD-SOI offering. Dubbed “22FDX™”, GF says the platform delivers FinFET-like performance and energy-efficiency at a cost comparable to 28nm planar, targeting mainstream mobile, IoT, RF connectivity and networking markets.

Asked by EETimes why FD-SOI here and now, GF’s CEO Sanjay Jha responded, “The mass market is at 28nm/22nm. Really it is leading-edge pure digital that is the niche.” (Read Peter Clarke’s full piece here.)

And so a new paradigm is born.

With FinFETs relegated to the leading-edge-pure-digital niche, GF says FD-SOI provides the best path for cost-sensitive applications (which is everything else, right?!). Their pitch: 22FDX offers the industry’s lowest operating voltage (0.4 volt), enabling ultra-low dynamic power consumption, less thermal impact, and smaller end-product form-factors. Plus it delivers a 20 percent smaller die size and 10 percent fewer masks than 28nm, as well as nearly 50 percent fewer immersion lithography layers than foundry FinFET.

It’s been three years since ST announced (in June 2012) that GF would be providing high-volume sourcing for FD-SOI, but you never saw it on GF’s website — til now. As of 13 July 2015, it’s there in a big way. Today, you can finally go to the GF website and see the headline on the homepage, or find out all about the offer on dedicated tech solution pages (click here to check it out yourself).


A snapshot of the GlobalFoundries website page for the new 22nm FD-SOI platform.


Target apps for 22FDX (Courtesy: GlobalFoundries)

“The 22FDX platform enables our customers to deliver differentiated products with the best balance of power, performance and cost,” said Jha, who was on hand for the big event in Dresden, Germany. “In an industry first, 22FDX provides real-time system software control of transistor characteristics: the system designer can dynamically balance power, performance, and leakage. Additionally, for RF and analog integration, the platform delivers best scaling combined with highest energy efficiency.”

And of course it’s good new for the folks at GF’s Fab 1 in Dresden, in the heart of Germany’s “Silicon Saxony” region. GF’s invested another $250 million for technology development and initial 22FDX capacity there (that’s on top of the >$5 billion they’ve invested there since 2009). Further investments to support additional customer demand are planned, plus partnering with R&D and industry leaders to grow a robust ecosystem and to enable faster time-to-market as well as a comprehensive roadmap for its 22FDX offering.

If you read the ASN coverage of the FD-SOI Workshop during LetiDays a few weeks ago, you saw that GF’s 22nm FD-SOI has a 14nm front end and 28nm back end (read it here if you missed it before). At LetiDays, they also talked about body-bias “generators”. In the 22FDX press release they’re referring to it as “…software-control of transistor characteristics to achieve real time tradeoff between static power, dynamic power and performance.”


GF slide from 22FDX launch shows the power of forward body-bias (Courtesy: GlobalFoundries)

4 Flavors

Here are the offerings in the 22FDX platform, each one targeting a specific area of applications.

22FD-ulp: ulp aka ultra-low power is an alternative to FinFET for the mainstream and low-cost smartphone market. With body-biasing, 22FD-ulp delivers greater than 70 percent power reduction compared to 0.9 volt 28nm HKMG, as well as performance equivalent to FinFET, says GF. For certain IoT and consumer applications, the platform can operate at 0.4 volt, delivering up to 90 percent power reduction compared to 28nm HKMG.

22FD-uhp: uhp aka ultra-high performance – this offers networking applications with analog integration the capabilities of FinFET while minimizing energy consumption. 22FD-uhp customizations include forward body-bias, application optimized metal stacks, and support for 0.95 volt overdrive.

22FD-ull: ull aka ultra-low leakage targets wearables and IoT. It delivers the same capabilities of 22FD-ulp, while reducing static leakage to as low as 1pA/μm (pA = picoamp = one million millionth (10-12) of an amp, folks). This combination of low active power, ultra-low leakage, and flexible body-biasing can enable a new class of battery-operated wearable devices with an order of magnitude power reduction.


Slide shown during the 22FDX launch summarizes GF’s four FD-SOI flavors. (Courtesy: GlobalFoundries)

22FD-rfa: rfa aka integrated RF and analog. It delivers 50 percent lower power at reduced system cost to meet the stringent requirements of high-volume RF applications such as LTE-A cellular transceivers, high order MIMO WiFi combo chips, and millimeter wave radar. The RF active device back-gate feature can reduce or eliminate complex compensation circuits in the primary RF signal path, allowing RF designers to extract more of the intrinsic device Ft performance.

GF says they’ve been working closely with key customers and ecosystem partners to enable optimized design methodology and a full suite of foundational and complex IP. Design starter kits and early versions of process design kits (PDKs) are available now with risk production starting in the second half of 2016.

What Customers and Partners are saying

ST: “GLOBALFOUNDRIES’ FDX platform, using an advanced FD-SOI transistor architecture developed through our long-standing research partnership, confirms and strengthens the momentum of this technology by expanding the ecosystem and assuring a source of high-volume supply,” said Jean-Marc Chery, chief operating officer of STMicroelectronics. “FD-SOI is an ideal process technology to meet the unique always-on, low-power requirements of IoT and other power-sensitive devices worldwide.”

Freescale: “Freescale’s® next-generation i.MX series of applications processors is leveraging the benefits of FD-SOI to achieve industry leading ultra-low power performance-on-demand solutions for automotive, industrial and consumer applications,” said Ron Martino, vice president of applications processors and advanced technology adoption for Freescale’s MCU group. “GLOBALFOUNDRIES’ 22FDX platform is a great addition to the industry which provides a high volume manufacturing extension of FD-SOI beyond 28nm by continuing to scale down for cost and extend capability for power-performance optimization.”

ARM: “The connected world of mobile and IoT devices depend on SoCs that are optimized for performance, power and cost,” said Will Abbey, general manager, physical design group, ARM. “We are collaborating closely with GLOBALFOUNDRIES to deliver the IP ecosystem needed for customers to benefit from the unique value of 22FDX technology.”

Verisilicon: “VeriSilicon has experience designing IoT SoCs in FD-SOI technology and we have demonstrated the benefits of FD-SOI in addressing ultra-low power and low energy applications,” said Wayne Dai, president and CEO of VeriSilicon Holdings Co. Ltd. “We look forward to collaborating with GLOBALFOUNDRIES on their 22FDX offering to deliver power, performance and cost optimized designs for smart phones, smart homes, and smart cars especially for the China market.”

Imagination: “Next-generation connected devices, in markets from wearables and IoT to mobile and consumer, require semiconductor solutions that provide an optimal balance of performance, power and cost,” said Tony King-Smith, EVP Marketing, Imagination Technologies. “The combination of GLOBALFOUNDRIES’ new 22FDX technology with Imagination’s broad portfolio of advanced IP – including PowerVR multimedia, MIPS CPUs and Ensigma communications – will enable more innovation by our mutual customers as they bring differentiated new products to the market.”

IBS: “FD-SOI technology can provide a multi-node, low-cost roadmap for wearable, consumer, multimedia, automotive, and other applications,” said Handel Jones, founder and CEO, IBS, Inc. “GLOBALFOUNDRIES’ 22FDX offering brings together the best in low-power FD-SOI technology in a low-cost platform that is expected to experience very strong demand.”

Leti: “FD-SOI can deliver significant improvements in performance and power savings, while minimizing adjustments to existing design-and-manufacturing methodologies,” said CEA-Leti CEO Marie-Noëlle Semeria. “Together, we can collectively deliver proven, well-understood design-and-manufacturing techniques for the successful production of GLOBALFOUNDRIES’ 22FDX for connected technologies.”

Soitec: “GLOBALFOUNDRIES’ announcement is a key milestone for enabling the next generation of low-power electronics,” said Paul Boudre, CEO of Soitec. “We are pleased to be GLOBALFOUNDRIES’ strategic partner. Our ultra-thin SOI substrate is ready for high-volume manufacturing of 22FDX technology.”

You might also want to check out GF’s 22FDX brochure (click here to download it) and watch their technical webinar: Extending Moore’s Law with FD-SOI Technology.

Choice is a beautiful thing, don’t you agree?

Big Boost for FD-SOI Momentum Seen at SF Workshop – Part 1 of 3: The FD-SOI Presentations (ST, Samsung, EDA & Design Houses)

The FD-SOI/RF-SOI Workshop in San Francisco last week was a huge success. Over 150 people from over 80 companies attended the all-day event. There were excellent presentations, animated Q&A sessions, and lots of networking going on over coffee, lunch and cocktails.  It generated excellent press (click here to see the EETimes feature) and lots of activity on LinkedIn and Twitter.

Everyone agreed it was an outstanding day, with all the presenters emphasizing the value, availability and ramp of FD-SOI. Feedback from the presenters indicates that the workshop spurred a significant boost in interest and opportunities.  As one participant noted, “This was very credible.”

If you didn’t make it to SF, we’ll cover the highlights in three ASN posts over the next few days (yes, it was that good!). Here in Part 1, we’ll cover the FD-SOI presentations. In Part 2, we’ll listen in on what was said during the panel discussion on FD-SOI. And in Part 3, we’ll take a look at the RF-SOI presentations. The actual presentations will all be posted shortly on the SOI Consortium website – keep checking back. But for now, here are some snapshots.


ST’s CTO Philippe Magarshack presented on FD-SOI Advantages for Applications and Ecosystem. He was very clear on the value proposition of FD-SOI, with multiple examples (and a tip of the hat to Soitec, which enabled ST with industrial FD-SOI substrate).

ST’s now got 18 active FD-SOI projects underway, he said. What’s driving it?  FD-SOI is all about integration, he pointed out: digital, analog/mixed-signal and RF for starters. Beyond mobile, he cited three key application segments:

  • networking infrastructure apps – thanks to low SER (soft error rates)
  • IoT – especially for ultra-low voltage
  • automotive – with a good summary of the value (see slide) and an example from video analytics (see slide).




He also provided a summary of the key design advantages:

  • effective DVFS
  • FBB (forward body bias) for dynamic transistor Vt (threshold voltage) control
  • simple analog integration (a distinct advantage over bulk and FinFET)
  • best SER (soft error rate)


With foundry partner Samsung and a complete design platform, the ecosystem is now in place, he concluded.


Kelvin Low, Sr. Director Foundry Marketing, Samsung SSI had a very clear message on the FD-SOI foundry offer: they are in business!

In his presentation, 28nm FD-SOI: Cost Effective Low Power Solution for Long Lived 28nm, he covered the technology migration history: scaling, material then structure innovation.

Driving home the message that 28nm will be a long-lived node, he said the PDK’s ready, foundry services are ready and they’re taking orders. (In fact, there was a whole team from Samsung there, answering additional questions and following up with prospective customers during the breaks.)

Kelvin showed manufacturability and reliability data, and PPA (power, performance, area) benchmarks (see slide).


For wearable apps, of course, low power is a must. Here, body biasing and low Vdd (supply voltage) are key, and again, 28nm FD-SOI shines (see slide).



Next came excellent presentations by the EDA giants.

Mike McAweeney, Sr. Director IP Product Sales presented Synopsys FD-SOI IP Solutions.

Amir Bar-Niv, Senior Group Director, Product Management, Design IP at Cadence presented FD-SOI: Ecosystem and IP Design.

These were largely the same presentations given by these companies at the Tokyo FD-SOI workshop in December. Click here for ASN coverage of that event and details on those presentations.

Design Experience

Ben-Hamida, High Speed Analog Design Manager, Ciena presented the company’s view of the value of FD-SOI in their new 100Gb/s transceiver (see slide). He was very enthusiastic in his support of FD-SOI, and its ability to deliver on its promises.


And finally, Shirley Jin, Sr. Director of Engineering at design house Verisilicon presented very compelling benchmarking data on an ARM Cortex A-7 in her presentation, 28nm FD-SOI Design/IP Infrastructure (see slide). Shirley gave a similar presentation in Tokyo in December. Headquartered in Shanghai, Verisilicon provides Silicon as a Platform Services (SiPaaS), taping out 50 chips a year for leading customers at foundries worldwide. Her presentation presented extensive, detailed 28nm FD-SOI benchmarking data for the ARM Cortex A7. VeriSilicon has an extensive IP portfolio in 28nm FD-SOI, working design flow and infrastructure to execute the designs.



Members of the SOI Consortium have been organizing these workshops around the world for the last six years (all the presentations from all the workshops are available here) and each one builds the momentum. But the workshops over the last six months (in Shanghai, Tokyo and now San Francisco) have taken that momentum to new levels. So keep an eye out for upcoming events, where more and more users will be sharing their FD-SOI and RF-SOI design experiences.

And stay tuned for Part 2 of ASN’s SF Workshop coverage – where we’ll cover the panel discussion, and the big news that Cisco’s on board with an FD-SOI chip of their own. Part 3 will cover the RF-SOI presentations, and the massive rate of innovation seen there.