The recently announced IBM z13, which is billed as the world’s fastest microprocessor, is built on SOI (of course!) (read the press release here).
At the heart of the latest in the IBM z-series of mainframes, the chip is manufactured in 22nm SOI (partially depleted). IBM says it is 2X faster than the most common server processors, has 300 percent more memory, 100 percent more bandwidth and vector processing analytics to speed mobile transactions. As one of the most sophisticated computer systems ever built, the z13 is the first system able to process 2.5 billion transactions a day, enabling transaction analysis in “real time” to help prevent fraud as it is occurring, allowing financial institutions to halt the transaction before the consumer is impacted.
IBM says the z13 lowers the cost of running cloud. For compared environments, it is estimated that a z Systems cloud on a z13 will have a 32 percent lower total cost of ownership over three years than an x86 cloud and a 60 percent lower total cost of ownership over three years than a public cloud.
The z-series has been on SOI since it first launched in 2003.
If current momentum is any indication, 2015 will be the year the tables turn in favor of FD-SOI designs (with a big shout-out to IoT). The RF-SOI juggernaut will continue cutting an enormous swath through the mobile market. Attention to the exciting possibilities of monolithic 3D (M3D) technology (like Leti’s “CoolCube”) will continue to grow, and SOI-based power apps will continue their strong drive into automotive and other markets. More exciting apps in MEMS, NEMS, photonics and sensors will come over the horizon. Players in China will join the upper echelons of SOI-based design and manufacturing. And you’ll read about it all here in ASN.
Riding on the success of the Shanghai RF-SOI and FD-SOI workshops last fall, 2015’s getting off to a great start with free FD-SOI/RF-SOI workshops in Tokyo (23 January, just after ASP-DAC) and San Francisco (27 February just after ISSCC – click here to register).
As of this writing, we just got the news that registrations for the Tokyo workshop had far exceeded expectations. There’s lots of excitement surrounding the prospect of the Sony presentation on their FD-SOI design experience, which we hear will be excellent. Samsung is slotted for a full half-hour presentation on their FD-SOI offering. There’ll be press coverage, and here at ASN we’ll be sure to bring you the full wrap-up.
ST and partners Leti, Soitec and IBM have long been leading the FD-SOI charge. At IEDM ’14 last month, they showed us how the roadmap extends to 10nm. (If you missed that, click here to read about it.) Now we’re looking forward to hearing about those 28nm FD-SOI chips hitting the markets this year.
And with Samsung on board now for ST’s FD-SOI process, things are looking ever more interesting. Earlier this month, Samsung’s Kelvin Low (Senior Director, Foundry Marketing) noted in his blog that, “28FDSOI comes with a complete design ecosystem” (PDK, Library, IP, and DFM – click here to read about it). “Customers who are looking to manufacture faster, cooler, and simpler devices at 28nm should look no further – 28FDSOI is the ideal choice,” he concluded.
Kelvin will also be presenting in the who’s who line-up at the prestigious Electronic Design Process Symposium (aka EDPS, coming up at Monterey Beach, CA in April – click here for more info.) In fact, the lead session of this year’s EDPS is entitled “FinFET vs. FDSOI – Which is the Right One for Your Design?” We look forward to some lively discussions there!
We heard a lot of promising developments at the Semicon Europa Low-Power Conference in the fall (if you missed that ASN coverage, click here to read it). Although they’ve been quiet in the press, at the conference it was clear that GloFo foundry guys are chomping at the bit. To recap, Manfred Horstmann, Director of Products & Integration for GlobalFoundries in Dresden said that FD-SOI would be their focus for the next few years. They’re also calling it ET-SOI (for extremely thin), and he said it’s the right solution for SOCs, especially with back biasing. Plus, it’s good for the fab because they can leverage their existing tool park. Asked if they have customers lined up, he said yes – so we’ll look forward to hearing about them this year.
And finally, this April we’ll be celebrating the 10th anniversary of ASN. It’s hard to believe 10 years have sped by since we published our first edition. Thank you for your continued support.
With best wishes for a safe, happy, healthy and prosperous 2015.
Paul Boudre has been named CEO of SOI wafer leader, Soitec (see financial press release here). The company also announced its plans to re-focus on its core electronics business unit.
Q3 sales were 48 million euros, up 45% over last year. The sale of 200mm wafers (which are used in chips for RF-SOI and smartpower) were almost doubled from last year, and now represent three quarters of the company’s wafer sales. 300mm wafers (which are used for partially and fully-depleted SOI logic) were up by 16%. The company expects to see the ramp for 300mm FD-SOI wafers in H2 2015.
Boudre joined Soitec from KLA-Tencor in 2007. He has served as the company’s COO since 2008. He now takes over the CEO role from the company’s founder, André-Jacques Auberton-Hervé, who will continue as Chairman of the Board.
Soitec is restructuring its solar business and implementing cost-cutting measures.
A new interactive WebEx webinar on FD-SOI design sponsored by CMC Microsystems has been posted. Entitled Design and Characterization of Circuits and Devices in the ST 28nm Fully-Depleted Silicon-On-Insulator (FD SOI) (click here to view it), it features two presentations by University of Toronto professors based on their recent experiences with circuit design in the ST’s 28nm FDSOI CMOS technology. The webinar provides insights about circuit design, the technology’s unique features and capabilities, test devices measurement results relative to other technologies, and explores how this technology can be used in mm-wave, high-speed digital and silicon photonics applications.
Two mixed-signal transceivers implemented in ST’s 28nm FDSOI CMOS technology targeting these applications are summarized. First, a low-power small-area transceiver compatible with the dense packaging technologies, such as silicon interposers, and operating up to 30Gb/s is presented. Second, a 20Gb/s wireline receiver including a decision feedback equalizer (DFE) with digital adaptation logic and a digital CDR are required. Both designs include both high-speed analog blocks and synthesized digital logic using the technology’s standard cell libraries.
The webinar lasts about an hour all told, with 5-minute Q&A sessions following each presentation. In the first minute or so there are a few technical snafus, but those are quickly resolved, so be patient: it’s worth the wait.
The IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (IEEE S3S) has issued the 2015 Call for Papers.
Now in its 3rd year as a combined event, the 2015 IEEE S3S Conference will take place in Sonoma Valley, CA, just north of San Francisco, October 5-8. This industry-wide event will gather together widely known experts, contributed papers and invited talks on three main topics: SOI technology, subthreshold architectures with associated designs and 3D integration. With its 40-year history, the SOI segment continues as world’s premier conference to present and discuss state of the art SOI technical papers.
Under a new agreement, Simgui now has the exclusive right to promote, distribute and sell Soitec’s 200-mm SOI wafers in China (see press release in English here; Chinese version here). Soitec is the world’s leading producer of SOI wafers. Shanghai Simgui Technology Co., Ltd. (Simgui), a Shanghai-based semiconductor materials company, is a spinoff of the Shanghai Institute of Microsystem and Information Technology (SIMIT/CAS).
Available in different product families, the 200mm SOI wafers are used in chips such as RF ICs broadly used in smartphones and power ICs for automotive applications. This agreement, which follows a previous licensing and manufacturing partnership between the two companies, represents another key step in establishing a Chinese SOI ecosystem while also strengthening Soitec’s presence in this double-digit-growth semiconductor market.
Two new products from semi equipment manufacturer Altatech: one for ultra-thin film deposition, and one for searching out nano-defects. Altatech is a division of Soitec, best known in the advanced substrates community for its leadership in SOI wafers. This part of the company, however, develops highly efficient, cost-effective inspection and chemical vapor deposition (CVD) technologies used for R&D and manufacturing of semiconductors, LEDs, MEMS and photovoltaic devices.
The company’s newest inspection system, the Orion Lightspeed™, is capable of pinpointing the size and location of nano-scale defects inside compound semiconductor materials and transparent substrates (see press release here). The new system helps to ensure the quality control of high-value engineered substrates used in several fast growing markets including high-brightness LEDs, power semiconductors and 3D ICs. Inspection is based on Altatech’s patented synchronous Doppler detection™ technology, which determines the exact size and position of defects by making direct physical measurements with resolution below 100 nm. This provides true defect sizing, as opposed to other types of inspection equipment on the market that make indirect measurements using diffracted light to calculate approximate defect sizes. It handles 200mm or 300mm substrates, with throughput of 85 and 80 wafers per hour, respectively. Beta systems have already been installed at customers’ facilities and are demonstrating excellent performance. Shipments of production units are scheduled to begin in April 2015.
The new AltaCVD 3D Memory Cell™ is the latest member of Altatech’s AltaCVD line, designed to deposit ultra-thin semiconductor films that enable the manufacturing of high-density, low-power memory ICs used throughout mobile electronics (see press release here). The new system performs atomic-layer deposition 10 times faster than conventional atomic-layer deposition (ALD) systems, helping to meet global market demands for both high-volume production and cost efficiency in fabricating advanced memories. The system is currently demonstrating its unique capabilities and performance at one of Altatech’s key customers. Production units are available.