Tag Archive TI

Great line-up planned for IEEE S3S (SOI, 3D and low-voltage — 5-8 October, Sonoma, CA). Advance Program available. Registration still open.

Now in its third year, the 2015 IEEE S3S Conference has evolved into the premier venue for sharing the latest and most important findings in

Body Biasing in FD-SOI: A Designer’s Nightmare or a Longtime Friend?

By Ali Khakifirooz (Spansion) One of the unique features of the FD-SOI technology is the ability of using a wide range of body bias to modulat

Spotlight on FD-SOI & FinFETs at Upcoming IEEE SOI Conference
(1-4 Oct. in Napa – register by 17 Sept. for best rate)

The 38th annual SOI Conference is coming up in just a few weeks. Sponsored by IEEE Electron Devices Society, this is the only dedicated SOI confe

Texas Instruments

Texas Instruments’ new ADS5400 analog-to-digital-converter (ADC) combines 12 bits of resolution with a 1-GSPS sampling rate, effectively doubli

Challenges Facing Embedded SRAM Scaling for the 32nm Node and Beyond

With scaling, SRAM design rules are far tighter than logic. New device structures may be needed. 6T SRAMs are the backbone of embedded CMOS memo

SOI for the Real World

TI is using SOI in key high-voltage, high-current and high-frequency analog components. The real world is analog. Things like temperature, sound

ATDF MuGFET Development Program

In January of this year, Soitec announced its participation as the SOI substrate supplier in an ATDF devel

45nm Multi-Gated FET (MuGFET) Devices and Test Circuits on SOI

The reticle used for this wafer is a 45nm technology test vehicle. Lithography was done using a 193nm wavelength scanner. Devices are made on a S