Optimization of RF circuits for high-resistivity SOI substrates facilitates multi-mode, multi-standard terminals integration.
The new generations of multi-mode, multistandards terminals increase the need to integrate digital, analog and RF functions on the same substrates using a System-on- Chip (SoC) approach. Silicon-on-Insulator (SOI), which can use high-resistivity (HR) wafers ( > 1000 ohms.cm) for the mechanical, supporting substrate (below the buried oxide), is enabling breakthroughs in designing RF circuits and integrating them with low-power, low-voltage digital.
HR-SOI substrates offer a drastic reduction in cross-talk (10dB at 1GHz), allowing layout of digital and analog/RF parts closer than in bulk, reducing chip area. They boost the quality factor of onchip inductors (+50%, see Figure 1) and varactors (+40%) with a strong positive impact on the consumption of RF circuits (by 40% on a VCO design, as explained below). They make it possible to integrate RF switches with the performance of III-V devices and with the low voltage operation and programmability of CMOS. Having high-Q RF switches on-chip will open new routes in designing multi-mode, multistandard wireless architectures.
At CISSOID, a start-up company specialized in analog and RF SOI design, we are working on optimizing RF circuits to take advantage of these high-resistivity SOI substrates. Our methodology, demonstrated on a low-power 5GHz Voltage-Controlled-Oscillator (VCO), was presented at the last ESSCIRC Conference. Figure 1 shows the intrinsic gain between a spiral inductor on a Patterned Ground Shield (PGS), giving the best quality factor on bulk (curve a), and the same inductor on high-resistivity SOI substrates (curve b). At CISSOID, we further optimized the inductor on HR-SOI to obtain the best quality factor, obtaining a gain of 50% (curve c).
Based on these results, we designed and optimized a 5GHz VCO. Figure 2 compares the phase noise versus the bias current for the VCOs optimized respectively on PGS and high-resistivity SOI substrates. For a given specification, the power consumption of the VCO on SOI is reduced by 40%.
This shows how the advantages of highresistivity SOI substrates combined with expert circuit design is pushing the limits for wireless systems-on-chip.