Pertinent reading for the SOI and advanced substrates communities.
Posted date : Apr 6, 2006

Nanometer-scale SOI membranes are conductive
A paper published in the journal Nature (439, 703-706, 9 February 2006) by researchers at U. Wisconsin-Madison and Soitec showed that the active silicon layer on an SOI wafer retains its conductive properties in vacuum, regardless of how thin it gets. Surface cleanliness turns out to be bigger factor than layer thickness in predicting resistivity.

SOI waveguide slows IBM light
IBM researchers have described how they used an SOI-based photonic crystal waveguide to slow light down to less than 1/300th of its usual speed (Nature 438, 65- 69, 3 Nov 2005). The company notes that this represents a big advance toward the eventual use of light in place of electricity in the connection of electronic components, potentially leading to vast improvements in the performance of computers and other electronic systems.

UCSB-Intel Researchers Acknowledge SOI Cooling Advantage
At IEDM 2005, a group of researchers from the University of California, Santa Barbara and Intel Corporation presented a paper entitled, “Analysis and Implications of IC Cooling for Deep Nanometer Scale CMOS Technologies.” The paper suggests that lower operating temperatures can reduce overall cost, and acknowledged that SOI-based devices are more responsive to cooling.

Microtube formation
In an article in the New Journal of Physics (7 241, 29 November 2005), researchers at U. Wisconsin and Soitec reported the formation of micrometer-sized SiGe/Si tubes by releasing strained SiGe/Si bilayers from substrates in a wet chemicaletching process.

Engineered GaN for RF Power
Researchers at Picogiga and Soitec presented a paper entitled “Manufacturing engineered wafers for GaN RF power applications” at GAASMANTECH 2005.

ST et al look at SGOI and sSOI structures
At ECS 2005, researchers from ST Microelectronics, CEA/Léti and Soitec presented a paper entitled, “Wet-cleaning and Surface Characterization of Si1-xGex Alloys (x = 0.2 to 0.5) After Polishing: Applications for SGOI and Strained-silicon Structures.”

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