Honeywell has sent SOI by Jupiter and to Mars. Now its SOI rad-hard foundry services are charting new frontiers with the industry’s first 150 nm rad-hard, digital ASIC solutions and more.
Honeywell’s path runs parallel to commercial markets. Chips destined for space are increasingly facing the same performance vs. power issues of chips we find down here on the ground. Deep space probes are collecting, sorting, sifting and sending tens of gigabytes of data and images back home daily. And in our interconnected world, every one of us depends on satellites every day.
With tightening budgets, aerospace programs need to be able to put more intelligence— read ‘processing power’—at the source, which in the aerospace context is a terrifically challenging environment with a very strict power budget.
But Honeywell’s not just about deep space— essentially anything that flies high—be it a military drone or a commercial aircraft—is in an environment not suited to your everyday electronics.
To meet these exigencies, Honeywell turned to SOI twenty years ago for all its electronics. “We’ve probably taken SOI material the farthest,” quips Gary Kirchner, Director of Engineering and Technology, Defense & Space Electronic Systems, Honeywell. Mars, Jupiter, Saturn—anywhere NASA’s been, Honeywell’s SOI has been there, too.
In addition to flying high, Honeywell also uses SOI for going down deep. SOI-based, high-temperature data acquisition systems and SOI-MEMS pressure sensors used in petroleum exploration, for example, have proved reliable for 5-year lifetimes and more at temperatures exceeding 225ºC.
Why SOI for Rad-Hard?
Radiation hardening, or rad-hard for short, is achieved through a combination of design and processing. It is critical for the space industry. As Jerry Yue, IC Development Manager at Honeywell, explains, “In a space environment, there are energized particles flying all over the place. As geometries get smaller and smaller, the digital circuits and memory cells tend to be more sensitive to charged particles. That’s not only true for space, but also for regular aerospace applications. For airplanes flying at high altitudes and with smaller geometries, the potential for a Single Event Upset (SEU) becomes an important issue.”
An SEU occurs when soft errors are generated within the circuitry as a result of cosmic rays, trapped protons or solar energetic particles. Honeywell gets a 10x reduction in charge collection volume using thin film SOI instead of bulk technology, reducing the probability of an SEU in four ways: reduced probability of a charged particle hitting a sensitive volume, reduced charge collection resulting from a hit, reduced duration of the voltage transient resulting from a hit, and greatly reduced probability of a single particle hitting a pair of associated sensitive volumes.
SOI also makes the chips impervious to single-event latch-up. For circuits in standard bulk CMOS, this occurs when parasitic elements are activated by charged particles, resulting in a high-current latch.
Future applications will require a lot more high-precision analog circuitry on the same design with digital CMOS. Cross-talk between the digital signal and analog is a big concern. Because of complete oxide isolation for transistors, SOI cuts down on cross-talk significantly. This enables the easy integration of high-precision analog circuit blocks with the high density ASIC circuits.
Whatever the application, concludes Yue, SOI makes it easier to do rad-hard design.
In the rad-hard world, Total Dose radiation— cumulative radiation from trapped protons, electrons, solar energetic particles and weapon-generated x-rays and y-rays—is measured in tens, hundreds or even thousands of kilorads(Si). This level of radiation can cause permanent damage to most unhardened electronics. Rad-hard technologies are designed to withstand this level of radiation, and rad-hard SOI technology provides additional advantages. That’s why Honeywell’s 150 nm rad-hard SOI IC technology going into full production in 2007 is a very significant event.
Reducing the feature size of individual transistors to 150 nm allows designers to place nearly four times more transistors on an IC than Honeywell’s previous generation technology, and significantly increases data computing volume and speed. The 15 million gate IC technology exponentially increases speed and bandwidth capabilities for processing and transmitting data in aerospace systems, including space satellites and networked battlefield systems.
“This new ASIC technology platform meets the speed and performance requirements of advanced flight and navigation systems, satellites, communications, radar equipment and smart munitions in development today,” Kirchner explains.
All of Honeywell’s Solid State Electronics Center (SSEC) standard products—including memory, micro-controllers and other standard ICs are built on SOI. Likewise, its ASIC families are all built on SOI CMOS, as are mixed signal SoCs.
Since 2001, the Honeywell SSEC division has offered a variety of SOI-based, customized RF and microwave design and foundry services for designers and manufacturers in wireless communication and high-speed fiber optic networks.
“We’re a relatively small foundry with a deep understanding of SOI technology,” explains Al Hurst, Microelectronics Sales Manager. In addition to its expertise, Honeywell’s unique value is its willingness to work closely with customers, even to the point of going in and making adjustments to foundry processes to optimize a platform for a customer’s business, he explains.
The company offers a full, flexible suite of design, test and packaging services. The foundry’s design cell libraries are all optimized for the SOI/rad-hard business area. Additional applications include:
• mixed mode system on chip (SoC) integrating RF, analog, digital and passive elements
• high-temperature electronics
• translating obsolete bulk CMOS parts to SOI
• integrated optical devices
• high-voltage (100–1000 volts)
• RFID tags
RFID tagging is an exciting new low-power domain. By using a high-resistivity SOI substrate, an antenna can be fully integrated in the top layer metal of an RFID tag, bringing down the cost per unit, explains Hurst. This has prompted some unique applications, and opened new doors for Honeywell, including opportunities in the medical arena, among others.
One of the challenges, however, is to help customer designers to understand the SOI possibilities and advantages—to get them to think outside of the bulk box. For new products, that means Honeywell is working closely with customers early in the design cycle. To help make small verification runs more cost-effective, the foundry can integrate a customer’s design into a common reticle set with other designs.
For Honeywell’s foundry customers, SOI design is completely painless, says Rick Veres, Honeywell’s EDA Manager.
For example, he says, “When doing an ASIC with us, we provide a toolkit containing synthesis, simulation and physical views of our library along with a number of Honeywellspecific tools to help guide the customer with pinlists, test specifications, the I/O ring and such. The actual ASIC design implementation from RTL-to-GDSII is realized through the Synopsys Pilot Design Environment.”
From the designer’s standpoint, it’s very easy to design with Honeywell technology. “So instead of linking to a bulk foundry library, you simply target Honeywell’s SOI library. Our toolkit development effort mitigates the messy SOI stuff during the library creation process, so you as a user do not have any new issues or risks,” explains Veres.
Those who want to upgrade an existing chip to SOI just have to provide a design database netlist, HDL or the actual physical layout. The technologies are QML-certified—which means that they automatically meet the requisite production standards for US government contracts, and don’t need requalification on a part-by-part basis.
As Kirchner has noted, “By adapting commercial technologies and design flow methods, Honeywell has been able to rapidly meet military and aerospace demand for next-generation components.”
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