Analog Circuit Design in SOI
Posted date : Jul 16, 2008

SOI provides key advantages for analog designers. Here’s how and why.

Many technical studies have shown that SOI CMOS technology offers substantial digital circuit performance improvements over bulk CMOS at the same lithography node.

As more CMOS fabs transition to SOI to enable these gains, analog circuit designers are faced with the task of accommodating the unique characteristics of this technology and leveraging them wherever possible.

Eliminates latchup

Figure 1section of a typical analog SOI . Cross device

Among the most important aspects in which SOI differs from bulk are substrate noise isolation, body voltage control, self-heating, and PN junction diode characteristics (see Figure 1).

The buried oxide layer that insulates SOI devices from the bulk substrate acts as a capacitor dielectric and blocks DC signals from coupling between devices. The most obvious advantage of this is in eliminating the possibility of latchup.

This has the further benefit of eliminating the need for extensive substrate or well contacts, saving area. The degree to which the buried oxide blocks AC signals depends strongly on the substrate resistance and the frequency.

Figure 2. Cross-section of a multi-fingered SOI device

Body contact strategies

SOI technologies offer device structures that permit the body of the device to be biased rather than float. A well-thought out body contact strategy is critical to successful analog circuit design.

DC circuit blocks like current almost always benefit from a body contact structure. Circuits in which the signal waveform is not periodic may also benefit from body contacts. Circuits with periodic input signals may perform optimally without body contacts because the periodic signal adequately determines the body potentials.

Other considerations

SOI devices are thermally isolated from one another as well as electrically isolated. If there are significant power differentials between devices that are intended to be electrically matched, self-heating can induce significant mismatch.

PN junction diodes are fabricated differently in SOI technology than they are in bulk CMOS. Lateral P-I-N diodes have been successfully produced in volume with excellent ideality over several decades of current. Such devices can be used to implement bandgap reference cells and temperature sensors in SOI.

As SOI becomes more popular, analog circuits are required for phase-locked loops, high-speed serial I/O circuits, and data converters. By leveraging SOI’s superior substrate noise isolation, body voltage manipulation, and by handling self-heating issues, analog circuit designers will reap the same benefits from SOI as digital designers do.

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