This SOI-based process requires no post-thinning passivation step.
Demand for better cameras in less expensive mobile phones is pushing researchers to find higher performance image sensor solutions for that cost-conscious end of the market. Last year, a research team from MagnaChip and JPL presented a paper at the International Electron Devices Meeting (IEDM 2007, Washington, DC) demonstrating the development of a production-worthy, backside-illuminated (BSI) monolithic sensor with 2.2 µm pixels. We used low-cost, standard fabrication techniques and available, mature technology modules. Compared to a conventional, frontside-illuminated (FSI) sensor, our 2-megapixel (MP) sensor exhibited comparable dark current and noise, but much higher quantum efficiency (QE) and sensitivity.
As shown in the figure, the height of the optical stack is much lower for the BSI pixel, leading to significant advantages in the effective pixel f/ (effective focal length) number. Furthermore, thanks to the high refractive index of silicon, light converges at the center of the pixel, and the optical energy is well-contained therein.
We began the fabrication process with SOI wafers, which enables the oxide to act as an etch-stop for accurate backside thinning. A special SOI layer configuration suppressed dark current generation at the BOX interface. This prevents QE loss at short wavelengths, reduces cross-talk, and provides a low-resistance backplane. An imager-compatible bulk-CMOS process was then used for fabrication. Before thinning, a handle wafer offering mechanical support was bonded to the processed wafer using a low temperature oxide-oxide process.
We connected the front-side metals to the bond pads on the (exposed) backside using tungsten-filled and liner-oxide-isolated through-silicon vias (TSVs). However, we did not use “3D” stacked technologies such as multi-wafer vias or bonding of multiple wafers with sub-micron alignment. This significantly enhanced manufacturability.
Next, we used backgrind to remove most of the silicon, followed by a dry silicon etch. This wafer-level thinning produced a thinned monolithic imager with a planar back surface, which is important for subsequent color filter and microlens processing. The processing finished with the connection of the backside bond pads to the TSVs, standard oxide/nitride passivation, and hydrogen anneal. We did not apply any special anti-reflective coating. The die assembly used a simple wire-bonded package, which is similar to that used in an FSI part.
As seen in the table, the BSI approach has a clear advantage over FSI in key areas. On a black and white sensor, the broadband QE (81% for BSI) was 2.7x better than FSI. Other parameters were comparable to or better than FSI. The fact that the mean dark current value and the hot pixel counts were similar for BSI and FSI indicates that we achieved a high-quality back interface without any post-thinning backside treatment.
Our results showed that a BSI sensor can capture a bright image using just one third of the light required by an FSI sensor. In practical terms, with BSI those birthday cake-and-candle pictures should have a much better chance of turning out – even when the lights are dimmed.
Tom Joy has worked in the CMOS industry for over twenty-eight years, including Hewlett Packard, Chartered Semiconductor, Agilent Technologies and Magnachip Semiconductor. For the last four years, he has been workinng on image sensor process development, and most recently on SOI based back illuminated sensors. He has a Ph.D. EE from the University of Notre Dame.
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