2009 IEEE SOI Conference
Posted date : Dec 4, 2009

5-8 October 2009 – Foster City, CA, USA


Click here to download the full advance program.

  • LATE NEWS: ARM 1176 Implementation in SOI 45nm Technology and Silicon Measurement
    Remy Pottier, et al. (ARM)
    The results from a 45nm SOI test chip demonstrate that SOI can provide up to 40 percent power savings and a 7 percent circuit area reduction compared to bulk CMOS low-power technology, operating at the same speed. This same implementation also demonstrated 20 percent higher operating frequency capability over bulk while saving 30 percent in total power in specific test applications. The test chip was based on an ARM 1176™ processor and enables a direct comparison between SOI and bulk microprocessor implementations. The results confirm SOI technology is a viable alternative to traditional bulk process technology when designing low-power processors for high-performance consumer devices and mobile applications. Read ARM’s article in this edition of ASN.
  • BEST PAPER AWARD: SRAM Yield Enhancement with Thin-BOX FD-SOI
    C. Shin, et al. (UC Berkeley, Renesas, Soitec)
    This paper, presented by EECS UC Berkeley graduate student, Changhwan Shin (who is advised by Professors Tsu-Jae King Liu and Bora Nikolic), won both the Best Paper Award and the Best Student Paper award. Read the overview by Shin and King Liu in this edition of ASN
  • FDSOI for Low Power CMOS
    Ghavam Shahidi (plenary, invited) (IBM)
  • Review of FinFET Development
    Malgorzata Jurczak (plenary, invited) (IMEC)
  • SOI Design
    Rich Goldman (plenary, invited) (Synopsys)
  • Si on Glass
    GeorgeWildemann (invited) (Corning)
  • 3D Systems
    Subramanian Iyer (invited) (IBM)
  • Ultra thin SOI for FDSOI Technology
    Daniel Delpra (invited) (Soitec)
  • Advanced Nano Devices
    Jason Woo (invited) (UCLA)
  • Demonstration of Low Temperature CMOS Devices on SiOG and SOI Substrates
    CK Williams, et al. (Corning, Rochester Institute of Technology)
  • High-Efficiency Solar Cell Embedded in SOI Substrate for ULP Autonomous Circuits
    O. Bulteel, et al. (UC Louvain)
  • SRAM Improvements with FDSOI Technology
    TJ King (invited) (UC Berkeley)
  • Analysis of sense margin and reliability of 1T-DRAM fabricated on thin-film UTBOX substrates
    N. Collaert, et al. (IMEC, Soitec)
  • Effect of Source/Drain Asymmetry on the Performance of Z-RAM™ Devices
    N. R. Mohapatra, et al. (AMD Fab36, Innovative Silicon)
  • SOI Applications in China
    M. Chen (invited) (Simgui)
  • SOI Design for High Performance
    K. Chang (invited) (Rambus)
  • SOI Design Libraries
    C. Frey (invited) (ARM)
  • Multiple Independent Gate FET Ring Oscillators with Dynamic Frequency Tuning
    D.G. Wilson, et al. (American Semiconductor)
  • FD-SOI MOSFETs for the Low-Voltage Nanoscale CMOS Era
    K. Itoh, et al. (invited) (Hitachi)
  • Platinum Silicide Metallic Source and Drain Process Optimization for FDSOI pMOSFETs
    V. Carron, et al. (Leti, ST)
  • Expanding Opportunities of Ultra Low Power and Harsh Applications with Fully Depleted (FD) SOI
    J. Ida, et al. (invited) (Kanazawa Institute of Technology, AIST)
  • Modeling of Electron Tunneling in SOI-MOSFET and Its Influence on Device Characteristics
    T. Hayashi, et al. (U. Hiroshima, Oki Semiconductor)
  • Thermal Considerations for Advanced SOI Substrates Designed for III-V/Si Heterointegration
    N. Yang, et al. (MIT, IQE, Teledyne, Soitec, Raytheon)
  • Optimal Design and Performance Assessment of Extremely-Scaled Si Nanowire FET on Insulator
    C.-Y. Chen, et al. (National Ilan U., National Cheng Kung U., IBM)
  • New method to extract interface states density at the Back and the Front gate interfaces of FDSOI transistors from CV-GV measurements
    L. Brunet, et al. (ST, Leti, IM2NP)
  • Fabrication of Compressively-Strained GeOI Substrates using the Smart CutTM Technology
    E. Augendre, et al. (Leti, IMEP-INP, Soitec)
  • Engineering Silicon-On-Insulator (SOI) Substrates for Hybrid Orientation Technologies (HOT)
    T. Signamarcheix, et al.  (Leti, Soitec)
  • Silicon-on-Sapphire, a Replacement for Gallium Arsenide?
    George. P. Imthurn (invited) (Peregrine)
  • Analyze of Temporal and RandomVariability of a 45nm SOI SRAM Cell
    Y. Laplanche (ARM)

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