“…you may hear more companies than just STMicro are doing a lot of designs on FDSOI, because
in addition to cost equivalents, they get significant power savings and speed up,” Herb Reiter,
founder and president of eda2asic told EDA Cafe in a recent interview. Adding that “…FDSOI […] design requirements are just like bulk silicon and are almost totally transparent to the designers,” he
concludes, “…consider the savings in the fab, where you have fewer process steps and less
processing time. Also, remember that with each step in manufacturing, the yield decreases – the
bottom line is that FDSOI is becoming really cost competitive for most apps.”
You must be logged in to post a comment.