Soitec estimates that it has shipped enough of its eSI wafers to fabricate more than 1.4 billion RF front-end semiconductor devices. (Read the press release here.) The proprietary Enhanced Signal Integrity™ (eSI) substrates are now the substrate of choice for manufacturing cost-effective and high-performance radio-frequency (RF) devices providing a power boost for 4G /LTE applications.
For eSI, Soitec and the Université catholique de Louvain (UCL) developed a technique that adds a “trap-rich” layer underneath the buried oxide, which freezes the parasitic surface conduction that’s inherent in any oxidized silicon substrate. (The technical details are clearly explained in an excellent ASN post by the Soitec and UCL team leaders – click here to read it.) Using a set of very specific patents, Soitec applied proprietary technology and accumulated knowledge to build the new eSI product line.
This substrate provides a raft of advantages to RF design. Because the trap-rich layer is built into the substrate, it reduces the number of process steps and relaxes design rules, leading to a highly competitive performance and die cost, including a smaller area per function. RF designers can therefore integrate diverse functions such as switches, power amplifiers and antenna tuners with excellent RF isolation, good insertion loss, better thermal conductivity and better signal integrity than other technologies. (Click here to read Soitec’s ASN post from December 2013 describing all the RF design challenges eSI answers.)
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