SOI Consortium 2019/20 New Members AMAT, Analog Bits, Antaios, Silicon Catalyst, SmarterMicro, Thalia
Posted date : Dec 4, 2019

As 2019 draws to a close, the SOI Consortium would like to recognize members that have joined over the course of this year: Applied Materials, Analog Bits, Antaios, Silicon Catalyst and SmarterMicro. And as we start off 2020, the Consortium is pleased to welcome Thalia Design Automation.

Here’s a bit of SOI-ecosystem background for each of them:

Applied Materials: AMAT has a long history in the heart of SOI ecosystem – in fact they’ve been working with SOI wafer-leader Soitec for over 25 years. AMAT is leading supplier of SOI-related process equipment, with systems for ion implantation, epitaxial deposition and chemical mechanical polishing (CMP). In fact their ion implanters are a key enabler to what became and is Soitec’s industry-leading Smart CutTM SOI wafer manufacturing process. And of course AMAT equipment is used to make virtually every chip in the world, so their breadth of vision as a Consortium member is clearly a wonderful addition.

Analog Bits: SERDES (Serializer/Deserializer) IP is central to many modern SOC designs, providing a high-speed interface for a broad range of applications from storage to display. Analog Bits has been revolutionizing SERDES IP by drastically cutting the power it pulls. In fact in porting the IP to the FD-SOI processes of leading foundries, Analog Bits has laid claim to the industry’s lowest-power SERDES IP. They have been an active and generous sponsor of SOI Consortium events for several years now.

Antaios: Antaios is a start-up in advanced memory technology. They are developing Spin Orbit Torque (SOT) non-volatile (NV) memory IP that is ultra-fast, durable, and reliable. The SOT-MRAM was proposed by SPINTEC and is now being developed by Antaios for nodes below 28nm where an STT-MRAM process is available. It is writable/readable in the nanosecond time scale making it particularly promising for cache memory applications (such as SRAM) for IoT, edge computing, AI and high-performance computing. SOT is an MRAM flavor that Antaios explains solves the STT-MRAM tug-of-war between endurance, speed and retention, thereby addressing both eFLASH and eSRAM replacement.

Silicon Catalyst: Silicon Catalyst is the world’s only incubator focused exclusively on accelerating solutions in silicon. They address the challenges faced by startups while guiding them from concept to product, providing a path to funding, free access to tools, testing and shuttle runs, along with advice on proper corporate governance and strategic execution. The 21 startups admitted since 2015 to the incubator are developing innovative solutions in a variety of areas including energy harvesting, wearables, silicon photonics, memory technology, loT, high performance computing, artificial intelligence, machine learning, wireless communications, and biomedical devices.

SmarterMicro: SmarterMicro is a fabless RF chip company. Their portfolio includes switches, power amplifiers and front-end modules FEMs. SOI technology provides the ideal platform for the software-defined RF front end module. They presented at several SOI Consortium events in Shanghai in recent years. Their 2018 presentation, RF-SOI in 5G Era and their 2017 presentation Reconfigurable RF PA and FEM with RF‐SOI, are available from our website. Dr. Li Yang of SmarterMicro received an SOI Consortium Industry Achievement Award in 2018 for outstanding contributions to RF-SOI, particularly citing the reconfigurable FEM, which debuted at Mobile World Congress in 2019.

Thalia Design Automation: Thalia’s Re-use Platform-as-a-Service (RePaaS) solution combines an innovative methodology, advanced design automation technology and experienced analog engineering resources. It helps analog IP providers to maximize re-use of their existing product portfolio, to create new product variants quickly and easily, and to adapt their designs for manufacture using any semiconductor foundry service. Thalia’s AMALIA™ EDA design tools comprise an intelligent analog design optimisation & automation toolset. The company has worked on multiple FD-SOI projects with body biasing, some of which are described in a recent company blog (read it here).

Interested in joining this dynamic organization? For information on how your company can become part of the SOI Consortium, visit our About Us page, then use the Contact  page to make your request.

About the author

Adele Hars editor