MEDEA+ T206: CMOS SOI for low power logic and RF wireless (CMOSSOI)
Posted date : Apr 18, 2005

Ongoing since 2002, the MEDEA+ T206 CMOS SOI project is scheduled to finish up this September. The objective is: “...to evaluate,

ATDF MuGFET Development Program
Posted date : Apr 18, 2005

In January of this year, Soitec announced its participation as the SOI substrate supplier in an ATDF devel

Soitec Characterization Lab
Posted date : Apr 18, 2005

Now in its third year, Soitec’s Characterization Lab in Bernin proposes a whole battery of electr

EUROSOI
Posted date : Apr 18, 2005

A preliminary public version of the “EUROSOI State of the Art Report” is now available at www.eurosoi.org. It compiles the contributions of m

EDS Honors SOI Pioneer
Posted date : Apr 18, 2005

SOI pioneer Jerry G. Fossum has received the most recent J.J. Ebers award, “For outstanding contributions to the advancement of SOI CMOS device

SOI By the Book
Posted date : Apr 18, 2005

A new book, SOI Device Technology by Makoto Yoshimi, PhD, covers the history of SOI, the floating body effect and a variety of LSI applications.

WORLD’S FIRST GaN-ON-INSULATOR
Posted date : Apr 18, 2005

Here’s a quick review of some recent Smart Cut activity. March 2005 - WORLD’S FIRST GALLIUM NITRIDE (GaN)-ON- IN

SOI-MEMS in OIL EXPLORATION
Posted date : Apr 18, 2005

While microelectronics relies on SOI for its insulating layer, SOI-MEMS benefits from the single crystal silicon of the top layer and substrate.

GaN On the Move
Posted date : Apr 18, 2005

• High Growth Projected for GaN According to a recent report in “SST” magazine, the Silicon Valley-based market research firm Strategies U

45nm Multi-Gated FET (MuGFET) Devices and Test Circuits on SOI
Posted date : Apr 18, 2005

The reticle used for this wafer is a 45nm technology test vehicle. Lithography was done using a 193nm wavelength scanner. Devices are made on a S