• High Growth Projected for GaN According to a recent report in “SST” magazine, the Silicon Valley-based market research firm Strategies U
The reticle used for this wafer is a 45nm technology test vehicle. Lithography was done using a 193nm wavelength scanner. Devices are made on a S
SOI CMOS processes using partially-depleted transistors, most commonly used in current advanced SOI processes (90nm and 65nm nodes), have already
• Soitec will have two invited and five contributed papers in the upcoming Silicon-on-Insulator Technolo
Apple® has started shipping the Mac® mini, which uses a G4 processor made by Freescale in SOI.