Category Archive Advanced Substrate Corners

Innovation Accompanies Steady Growth In Power Devices
Posted date : Apr 6, 2006

The power devices market may be small, but it has a strong tradition of pioneering important advanced technologies. Within the microelectr

NIST Nanowire Transistors on SOI
Posted date : Dec 7, 2005

New design simplifies processing and on/off switching Using SOI as the substrate, researchers at the National Institute of Standards and Technol

MIRAI-ASET Working on SGOI and GeOI
Posted date : Dec 7, 2005

3,1 times greater hole-mobility observed in ultra-thin GeOI   MIRAI-ASET, a government-sponsored Japanese research consortium, has been wo

Ballistic SOI-MOSFETs: Ultimate High-Speed CMOS Devices
Posted date : Dec 7, 2005

The carriers’ ballistic transport is a key issue for realizing future high-speed CMOS devices. At the 2004 VLSI Technology Symposium in Honolul

New Options for GaN RF
Posted date : Dec 7, 2005

Smart Cut™ enables innovative substrate solutions GaN HEMT technology holds enormous promise for increasing the power of commercial RF a

Just 0.3V operating voltage for Seiko Instruments Inc.’s charge-pumping FD-SOI IC
Posted date : Dec 7, 2005 SII's new chip can leverage energy sources such as personal body-heat or natural illumination   SII (Seiko Instruments

More and More Strain
Posted date : Dec 7, 2005

Dr. Yoshimi reviews some recent approaches to strained SOI implementation Implementing strain into the channel of MOSFETs has become m

MEDEA+ 2T101: sSOI for High-Performance ICs
Posted date : Jul 11, 2005

The objective is to provide an industrial source of large diameter strained SOI wafers within 3 years. A “Phase 2” MEDEA+ project,

Posted date : Jul 11, 2005

Financing approved for new III-V program The first phase of OPTIMUM, a new III-V research project lead by Thales

10 Years – Already?
Posted date : Jul 11, 2005

One of the world’s leading SOI experts considers Smart Cut innovations and future potential. I remember a meeting with a PhD stud