At the most recent SOI Consortium FD-SOI workshop, Soitec gave a presentation on FD-SOI substrate readiness. Here are some of the highlights.
Deeply scaled PD- and FD-SOI require new approaches to ESD protection. Recent work from Stanford and GlobalFoundries on gate controlled FEDs sh
SOI is at the heart of silicon photonics. Here's an overview of past, present and future trends.
The existence of Silicon Photonics owes much to
Transferring a processed (or partially processed) layer of circuits from one wafer onto another enables innovative new solutions for BSI, MEMS, R
ST's newest SOI-based smart power technology delivers big reductions in power consumption in medical equipment, hybrid-electric-vehicle chargers
A new Yole report highlights growth of SOI MEM S.
Although MEMS technologies are not driven by CD shrinking as ICs, that does not mean MEMS do
VLSI projects that a critical mass of expertise will support a fast transition to SOI designs at 32nm.
The semiconductor market recovery has hel
A technological tour-de-force, Soitec's wafers for FD SOI meet all the requirements
At the 20 nm node, short channel effects and random
ARM's verified the SOI SPICE models accuracy in its physical IP, helping designers to simulate their chips prior to tape-out as well as helping t
GaN-on-Si is moving towards becoming a cost-effective enabler for next-generation LED and power devices.
During the past decade gallium nitride
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