Category Archive Editor’s Blog

FD-SOI: The Right Choice
Posted date : May 14, 2011

Although Intel will do FinFETs at 22nm, FD-SOI remains the better alternative for most all the industry for low power and mobile apps. In the wee

MEMS on SOI – Growing Fast and Faster
Posted date : Apr 6, 2011

In the latest ASN posting by Dr. Eric Mounier of Yole Developpement, “SOI for MEMS: A Promising Material”, he notes that SOI MEMS is growing

The SOI Papers at ISSCC 2011
Posted date : Mar 11, 2011

The International Solid-State Circuits Conference – better known as ISSCC – is of course where the big guns show us their big advances at th

Topple the Towers: Freescale’s SOI SoC in Alcatel-Lucent’s lightRadio
Posted date : Feb 25, 2011

45nm SOI is a big part of the big news from the Mobile World Congress 2011 in Barcelona last week. That's because Freescale's newly announced Qo

SOI: It’s Elementary, My Dear Watson
Posted date : Feb 18, 2011

The other night, IBM's “Watson” supercomputer beat the world's two best players in the popular “Jeopardy” game show, in which the conte

SOI Consortium’s phenomenal FD-SOI/ARM results
Posted date : Feb 10, 2011

Up to 80% additional performance improvement on an ARM Cortex M0. 40% lower power for SRAMs. These are the amazing planar FD-SOI results just ann

SOI Luminaries Shine in IEDM Awards
Posted date : Jan 24, 2011

Of those receiving top awards at the IEDM last month, over half (!) are stars of the SOI community. Wow. I discovered this while putting toget

AMD’s New Fusion APU’s on 32nm SOI
Posted date : Jan 13, 2011

The AMD PR folks are calling their new Fusion APUs the era of  "Personal Supercomputing"  – and its flagships are on 32nm SOI   We've been

2011 & SOI: Doing It.
Posted date : Jan 5, 2011

What will 2011 bring in the world of SOI? The hot topic will no doubt be FD-SOI – the planar, fully-depleted SOI solution that's the top conte

ARM Tunes SOI SPICE for PPA
Posted date : Dec 21, 2010

“SOI SPICE models that predict actual results with the greatest accuracy enable designers to fully exploit design trade-offs in terms of power,