Category Archive ASN #5

Photoreflectance: Promising Metrology on sSOI

OMI describes a new approach to in-line strained SOI metrology. Strained-SOI (sSOI) requires fast, accurate and non-contact strain metrology. To

Strained Silicon-On-Insulator (sSOI) Becomes an Industrial Reality

After several years of rigorous R&D work in close partnership with suppliers and customers alike, Soitec’s sSOI wafers are now ready for in

Strained Engineered Substrates: sSOI and Beyond

The semiconductor industry has entered an exciting phase in which further performance gains (power, speed) are directly connected to materials en

Enhanced Strained Silicon-On-Insulator CMOS Devices

Freescale has investigated a selective biaxial-uniaxial strain hybridization method that significantly enhances drive current without adding proc

AMD & SOI: Winning with Performance/Watt/Dollar

Nick Kepler, vice president of logic technology development at AMD talks about the role of SOI in the company’s strategy. Advanced Sub

Honeywell & SOI: Military, Aerospace and Beyond

Honeywell has sent SOI by Jupiter and to Mars. Now its SOI rad-hard foundry services are charting new frontiers with the industry

Partners In Design: Standard Tools Simplify Rad-Hard SOI Design

Honeywell has worked with the top EDA tool vendors to develop the SOI process design kits (PDKs) needed by both in-house designers

A New Generation of Structures

Bonding and thinning technologies pave the way to new substrates for MEMS and power ICs, and enable the transfer

The Memory of an SOI Champion Lives On

Soitec pledges to honor the life’s work of co-founder Jean-Michel Lamure with continued success and

EE Times Ace Awards Again Honor SOI Innovators

Freescale’s Leo Mathew was chosen for his novel transistor structure. IBM & Microsoft