Tag Archive Mentor

More Good FD-SOI News from DATE Conference – ST, Leti, Mentor, CMP
Posted date : May 22, 2013

At the recent DATE Conference in Grenoble (DATE is like DAC, but in Europe, alternating yearly between Grenoble and Dresden), STMicroelectronics,

Go Ahead – Take 28nm FD-SOI Out for a Test Drive
Posted date : Oct 31, 2012

CMP is offering multi-project wafer runs of ST's 28nm FD-SOI technology on Soitec wafers with Leti models. It's the same technology that GF will

ST White Paper Excerpts: Planar Fully-Depleted Silicon Technology to Design Competitive SOCs at 28nm and Beyond
Posted date : Apr 24, 2012

STMicroelectronics recently issued a major white paper detailing the choice of FD-SOI for consumer SOCs at 28nm and beyond. This article excerpts

Bulk logic designs for mobile apps port directly to FD-SOI
Posted date : Nov 4, 2011

Bulk logic designs can be ported directly to FD-SOI for high-performing, low-power mobile apps. Fully-depleted (FD)-SOI is a potential alternati

Calibre Adapts Easily to SOI
Posted date : Jul 16, 2008

How tools from Mentor keep SOI transparent for design; flexible and robust for tapeout. The Mentor Graphics Calibre® nm Platform is built to p

Partners In Design: Standard Tools Simplify Rad-Hard SOI Design
Posted date : Jul 11, 2006

Honeywell has worked with the top EDA tool vendors to develop the SOI process design kits (PDKs) needed by both in-house designers