Tag Archive modelling

Interview: Leti CEO Laurent Malier on FD-SOI and more
Posted date : Jan 23, 2014

CEA-Leti is one of the world's most important research institutes for micro- and nano-electronics. Key enabler to the greater SOI-based community

Leti: Adding Strain to FD-SOI for 20nm and Beyond
Posted date : Apr 30, 2012

Work at Leti shows that strain is an effective booster for high-performance at future nodes. The outstanding electrostatic performance already r

ST White Paper Excerpts: Planar Fully-Depleted Silicon Technology to Design Competitive SOCs at 28nm and Beyond
Posted date : Apr 24, 2012

STMicroelectronics recently issued a major white paper detailing the choice of FD-SOI for consumer SOCs at 28nm and beyond. This article excerpts

FD-SOI Workshop in SF Follows ISSCC – Registration (Free!) Now Open
Posted date : Feb 7, 2012

Want to learn first-hand what's going on in the world of FD-SOI? (aka Fully-Depleted Silicon-On-Insulator) The SOI Industry Consortium, CEA-

Right Timing
Posted date : Dec 8, 2010

ARM's verified the SOI SPICE models accuracy in its physical IP, helping designers to simulate their chips prior to tape-out as well as helping t