Tag Archive PD-SOI

New SOI Textbook (and e-book) with contributions by experts at Soitec, GF, TSMC, Leti and more
Posted date : Aug 8, 2014

A new book entitled Silicon-On-Insulator (SOI) Technology, Manufacture and Applications (1st Edition) features contributions by experts at Soitec

Body Biasing in FD-SOI: A Designer’s Nightmare or a Longtime Friend?
Posted date : Apr 30, 2014

By Ali Khakifirooz (Spansion) One of the unique features of the FD-SOI technology is the ability of using a wide range of body bias to modulat

IEDM ’13 (Part 2): More SOI and Advanced Substrate Papers
Posted date : Dec 19, 2013

SOI and other advanced substrates were the basis for dozens of excellent papers at IEDM '13.  Last week we covered the FD-SOI papers (click here

Boost for SOI Wafer Supply Chain: Soitec, SunEdison End Legal Feud, Agree on Patent Cross-Licencing
Posted date : Nov 27, 2013

Good news for the SOI ecosystem: SOI wafer suppliers Soitec and SunEdison (formerly MEMC) have ended their longstanding legal feud and entered in

FD-SOI: A Quick Backgrounder
Posted date : May 27, 2011

For those new to FD-SOI, here's a short description of the basic principles. FD SOI transistors are constructed on an ultrathin Silicon layer (&

The SOI Papers at ISSCC 2011
Posted date : Mar 11, 2011

The International Solid-State Circuits Conference – better known as ISSCC – is of course where the big guns show us their big advances at th

Fully Depleted (FD) vs. Partially Depleted (PD) SOI
Posted date : May 14, 2008

FD-SOI enables the use of a slightly different transistor structure than PD-SOI. Each has advantages and disadvantages. Here is a quick layman's