Tag Archive silicon-on-insulator

In the three months following Peregrine Semi’s announcement of the latest version of its UltraCMOS® process technology, the company has followed with a steady stream of news
Posted date : May 31, 2013

In the three months following Peregrine Semi's announcement of the latest version of its UltraCMOS® process technology, STeP8 for RF Front End I

Targeting low-power SRAM for FD-SOI and FinFETs, UK physical IP start-up sureCore has received a £250K grant from the Technology Strategy Board SMART
Posted date : May 31, 2013

Targeting low-power SRAM for FD-SOI and FinFETs, UK physical IP start-up sureCore has received a £250K grant (about 292K Euros or $380.5K) from

Peregrine’s UltraCMOS® Semiconductor Technology Platforms: A Rapid Advancement of Process & Manufacturing
Posted date : May 27, 2013

For more than 20 years, Silicon-on-Sapphire (SOS) technology—an advanced form of Silicon-on-Insulator (SOI) processing—has been used in semic

MOSIS, a provider of low-cost prototyping and small volume production services for custom ICs, has teamed up with ePIXfab, the European Silicon Photonics support center providing low-cost prototyping services for photonic ICs.
Posted date : May 23, 2013

MOSIS, a provider of low-cost prototyping and small volume production services for custom ICs, has teamed up with ePIXfab, the European Silicon P

Dr. Jean-Pierre Colinge received the 2012 IEEE Andrew S. Grove award at the last ESSDERC-ESSCIRC Conference, for his “contributions to silicon-on-insulator devices and technology.”
Posted date : May 23, 2013

IEEE Division I Director, Cor Claeys (right) of imec, honoring Dr. Jean-Pierre Colinge (left) of TSMC for receivingthe 2012 Andrew S. Grove Awar

The FD-SOI design and manufacturing ecosystem has just gotten a €360M boost.
Posted date : May 23, 2013

The FD-SOI design and manufacturing ecosystem has just gotten a €360M boost. A new 3-year public-private project involving 500 engineers from 1

More Good FD-SOI News from DATE Conference – ST, Leti, Mentor, CMP
Posted date : May 22, 2013

At the recent DATE Conference in Grenoble (DATE is like DAC, but in Europe, alternating yearly between Grenoble and Dresden), STMicroelectronics,

IEEE SOI Conference (Oct., Monterey) Expands, Extends Call for Papers
Posted date : May 17, 2013

IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference Hyatt Regency Monterey Hotel and Spa, Monterey, California October 7th

ST’s FD-SOI Wins EETimes ACE Award… and Customers!
Posted date : May 2, 2013

Two important FD-SOI wins for STMicroelectronics have just been announced: The EETimes ACE Award for Energy Technology; Customers. The E

IBM: FinFET Isolation Considerations and Ramifications – Bulk vs. SOI
Posted date : Apr 18, 2013

Fully-depleted transistor technologies, both planar and fin-type, are now in the mainstream for product designs. One of the many interesting topi