Tag Archive UC Berkeley

Silicon Valley FD-SOI 2018 Training Day is April 27th – Don’t Miss It!
Posted date : Apr 6, 2018

Following the immense success of last year's FD-SOI training day in Silicon Valley, the SOI Consortium has another one planned for the end of Apr

Quick Preview of (Great!) FD-SOI Design Tutorial Day (14 April ’17, Silicon Valley)
Posted date : Mar 30, 2017

Would you like to better understand FDSOI-based chip design? If you're in Silicon Valley, you're in luck. On April 14th, the SOI Consortium is or

Chenming Hu: SOI Can Empower New Transistors to 10nm and beyond
Posted date : Apr 23, 2012

FinFET and FD-SOI transistors look different but share a common principal that allows MOSFETs to be scalable to 10nm gate length. The good, old

Important News Comes Out of Recent FD-SOI Workshop
Posted date : Mar 9, 2012

The SOI Consortium's 6th FD-SOI workshop, held just after ISSCC, yielded some exciting news. Most of the presentations are freely available for d

SOI Luminaries Shine in IEDM Awards
Posted date : Jan 24, 2011

Of those receiving top awards at the IEDM last month, over half (!) are stars of the SOI community. Wow. I discovered this while putting toget

The right choice for 22nm SRAM
Posted date : Dec 4, 2009

What is the best transistor structure to meet SRAM performance and yield requirements at the 22nm node? The semiconductor device research group

Through the Back Gate
Posted date : May 14, 2008

Might the Back-Gated FD-SOI MOSFET be the ultimate transistor structure? The fully depleted silicon-on-insulator (FD-SOI) MOSFET structure has