GSA / SOI Consortium SOC Design
Market Survey

Mobile Internet Devices (MIDs) are expected to grow at an unprecedented rate over the next 10 years, resulting in a demand the semiconductor industry has never seen before. According to Morgan Stanley, this growth indicates a potential volume of 10 billion units in this market by 2020.

To prepare for this demand, SOI Consortium and GSA have partnered to help define the technology requirements for MIDs based on information surveyed across major semiconductor companies. By completing this brief survey, companies will help GSA and SOI Consortium analyze and present relevant insightful information on technology characteristics, supply-chain readiness and affordability of the silicon technology.

Deadline: August 13, 2010

Link: http://www.gsaglobal.org/surveys/soi/index.asp

* All participants will receive a copy of the final report.
* All data will be held confidential and reported only in aggregate.

May. 6, 2010 BroadPak joins SOI Industry Consortium

  SOI Industry Consortium confirms new board members

Mar. 23, 2010 Major semiconductor companies join forces to launch design chain solution for silicon-on-insulator technology

» more consortium news

Is SOI the Holy Grail solution for addressing the power gap in advanced SoC designs?
[ARM Community Blogs]

SOI ‐ 
The 
next 
five 
years: The
 critical 
role 
that 
SOI 
will 
play 
in 
the
 semiconductor 
market

Euro
SOI
 2010
 - Grenoble, 
France
 [Horacio Mendez, Executive Director, SOI Industry Consortium]

Presentation: Silicon results of ARM core 1176 in SOI – A 40% power reduction
[by Remy Pottier, Jonathan Tong, Chris Hawkins, Roma Kundu and Jean-Luc Pelloie, ARM]

Jun. 23, 2010 SOI Scalability
[by Harry Gries, ASIC Methodology and EDA Technology Consultant]

Jun. 9, 2010 Cadence Announces Comprehensive SOI Design Hub
[Cadence]

May. 24, 2010 Cadence, IBM team for 32-nm SOI IP
[EDN]

Apr. 7, 2010 Getting IP, Tools, And People “Ready For SOI”
[Cadence]

Apr. 6, 2010 The Time is Right for SOI Technology Adoption
[ChipEstimate.com]

» more articles

Jul. 1, 2010 EDA Consolidation Continues
It too is expanding its product portfolio and launched a comprehensive silicon-on-insulator (SoI) Design Hub, a new Web portal that will help lower barriers to adoption of SoI technology by reducing initial start-up costs, reducing time ... [Sramana Mitra on Strategy]

Jul. 1, 2010 Ellison Makes Pressure Transducers Using Silicon on Sapphire
[SA Instrumentation & Control]

Jun. 23, 2010 AMD's Opteron 4100s march into x64 price war
Both chips are implemented in a 45 nanometer silicon on insulator process and manufactured by GlobalFoundries, the chip foundry that AMD spun out last year. [The Register]

» more articles

The Truth About Power and Process Technology
[Horacio Mendez, Executive Director, SOI Industry Consortium]

Low-Power Design with Material Impact on Silicon-on-Insulator Technology
[Horacio Mendez, Executive Director, SOI Industry Consortium]

SOI – Integrated Technology, IP and Design Flow for Customer Success
[Gordon Starkey, IBM Systems & Technology Group; David Desharnais, Group Marketing Director, Cadence Design Systems; Tom Lantzch, VP Marketing, ARM]