Since the beginning of the year, there’s been a steady stream of excellent news around Samsung Foundry’s 28FDS, their highly successful 28nm FD-SOI offering. Let’s take a look at what’s been happening, as things do seem to be accelerating. By way of reminder, they announced the industry’s first eMRAM (embedded MagnetoResistive RAM) testchip tape-out milestone on 28FDS in September 2017 (you can read the press release here) – which was just a year after they had announced mass production of 28FDS process technology.
At the end of 2018, Arm announced the industry’s first Embedded MRAM (eMRAM) compiler IP built on Samsung Foundry’s 28FDS process technology.
Follow that with this announcement at the beginning of 2019: Soitec Expands Collaboration with Samsung Foundry on FD-SOI Wafer Supply. The two companies announced that Samsung had secured a high-volume supply of FD-SOI technology to meet industry’s current and future demands especially in consumer, IoT and automotive applications.
In March came two more big announcements. First: Samsung Electronics Starts Commercial Shipment of eMRAM Product Based on 28nm FD-SOI Process. As they noted in the PR, “Samsung’s 28FDS-based eMRAM solution offers unprecedented power and speed advantages with lower cost. Since eMRAM does not require an erase cycle before writing data, its writing speed is approximately a thousand times faster than eFlash. Also, eMRAM uses lower voltages than eFlash, and does not consume electric power when in power-off mode, resulting in great power efficiency.”
Hard on the heals of that came the news that Arm and Samsung Announce IP Platform including eMRAM for 18nm FD-SOI.
At the SOI Consortium’s Silicon Valley Symposium in April, Tim Dry (he’s Samsung’s Director of Foundry Marketing for Edge and End Point), gave a terrific presentation. Entitled Samsung’s FDS with MRAM: Enabling Today’s Innovative Low Power Endpoint Products, it details the company’s FDSOI roadmap for the IoT Endpoint Platform (and yes, you can download in its entirety).
Then in May at the big Samsung Foundry Forum in Silicon Valley, Arm, in collaboration with Samsung Foundry, Cadence, and Sondrel, demonstrated the first 28nm FD-SOI eMRAM IoT test chip and development board. The Musca-S1 test chip demonstrates a new choice in SoC design for IoT solutions, said Arm. (Sondrel, btw, is Europe’s largest independent IC design consultancy.)
In parallel, Cadence announced: Cadence Custom/AMS Flow Certified for Samsung 28nm FD-SOI Process Technology. Especially aimed at digitally-assisted analog designs, what’s new here is that the Cadence custom and analog/mixed-signal IC design flow is now Samsung Foundry certified for 28FDS. Samsung’s 28FDS PDK techfile is Mixed-Signal OpenAccess ready, enabling customers to deploy OpenAccess-integrated, fully interoperable Virtuoso-Innovus implementation flows.
For its part, at its Foundry Forum, Samsung unveiled extensions of the company’s FD-SOI (FDS) process and eMRAM together with an expanded set of state-of-the-art package solutions. They indicated that the development of the successor to the 28FDS process, 18FDS, and eMRAM with 1Gb capacity will be finished this year.
And finally, companies like NXP are shipping exciting new products fabbed on Samsung’s 28FDS. Ron Martino, VP & GM of NXP’s i.MX Application Processor Product Line covered key products in his presentation at the SOI Consortium’s Silicon Valley Symposium (see our coverage here). Among them: the i.MX7ULP for long battery life with 2D & 3D graphics for wearables and portables in consumer and industrial applications; the i.MX 8 and 8X subsystems for automotive and industrial applications; and the i.MX RT series of “cross-over” processors. The i.MX RT ULP (real-time, ultra-low-power) series, which Martino says is the “new normal”, deals with a high number of sensor inputs. The i.MX RT 1100 MCUs, which have been qualified for automotive and industrial applications, are breaking the gigahertz performance barrier.
In July, linuxgizmos.com reported that, “In June, NXP began volume shipments of its super power-efficient i.MX7 ULP, which it announced in 2017. The SoC is billed as the most power-efficient processor on the market that also includes a 3D GPU. […] the ULP version includes a 3D graphics capable Vivante GC7000.” (Vivante, btw, is a VeriSilicon company, which is an SOI Consortium member and a leading proponent of FD-SOI design and IP in China and worldwide.)
This is leading to some really nice wins for NXP. For example, they’ve got Amazon’s Alexa Voice Service (AVS) leveraging the i.MX RT crossover processor, enabling developers to quickly and easily add Alexa voice assistant capabilities to their products. The RT series has rapidly been expanded, with versions for voice-controlled devices and offline face and expression recognition capabilities for smart home, commercial and industrial devices.
Also announced this summer: NXP and Microsoft Bring Microsoft Azure Sphere Security to the Intelligent Edge with a New Energy-Efficient Processor. That collaboration includes development of a new crossover applications processor in NXP’s i.MX 8 series integrating Microsoft’s Azure Sphere security architecture and Pluton Security Subsystem. Their customers “will be able to harness the high-performance and energy efficiency of NXP’s i.MX 8 applications processors combined with Microsoft’s unequaled security and assurance provided by Azure Sphere certified chips”.
As Martino concluded in his presentation, “The future of embedded processing [is] enabled by FD-SOI.” And Samsung Foundry’s FD-SOI offerings are clearly a massive enabler of that future.
Two of the big, recent breakthroughs in memory technology – eMRAM and ePCM – have gotten their start in volume manufacturing on 28nm FD-SOI. In conjunction with the 2019 IEEE International Memory Workshop, SOI Consortium members Leti and Applied Materials have teamed up to give a technical program to explore short-term and long-term memory solutions. While the workshop is not specific to SOI, given the recent foundry announcements about ePCM and eMRAM for FD-SOI, the organizers predict it will be of particular interest to those following the greater SOI ecosystem. The event takes place at the end of the Sunday IMW tutorial day, starting at 5:30pm at the Hyatt Regency in Monterey, CA. Please see this page for the program and registration information.
Here is the program:
Jean-Eric Michallet, Head of Leti’s Microelectronics Components Department, Silicon Component Division is one of the organizers. Here is his overview:
FD-SOI is expected to be a long-lived technology. It enables planar CMOS scaling and accommodates a great deal of More-than-Moore developments where its ability for low power and great analog performance can make a difference for IoT, Automotive, Machine Learning or 5G applications. But to do this it requires a high-performance and cost-effective non-volatile embedded memory option. The incumbent Flash cell is reaching the end of its roadmap due to the difficulty of shrinking the bitcell and manufacturing, as well as the finished wafer cost increase. Back-end integrated Random Access Memory in advanced CMOS process has been explored for many years now as a competitive solution for fast-write and low-voltage non-volatile embedded memories. Foundry availability of embedded Magnetic RAM and Phase Change RAM for FDSOI 28nm platforms has been announced recently, showing that these technologies have now reached industrial maturity. CEA-Leti and Applied Materials invite you to attend a technical program to explore short-term and long-term memory solutions, from early research to industrialization.
Registration is open, free, and available to all IMW attendees, and others. However, as seating is limited and as we have already several participants pre-registered, registration is by invitation only and early registration is recommended. If you are interested, please email Jean-Eric Michallet.
The event is presented in conjunction with the 2019 IEEE International Memory Workshop, to be held on Sunday, May 12th, 2019, Hyatt Regency, Monterey CA, starting at 5:30 pm.
Per Arm, the industry’s first eMRAM compiler IP is now on Samsung’s 28nm FD-SOI technology. The announcement was made in a post by Kelvin Low, VP Marketing for ARM’s Physical Design Group (read it here). He said that ARM has successfully completed their first eMRAM IP test chip tapeout. The Arm eMRAM compiler IP will be available from 4Q 2018 for lead partners.
Samsung Foundry’s 28nm FD-SOI process technology is called 28FDS. eMRAM (which stands for embedded MagnetoResistive RAM) is a novel non-volatile memory (NVM) option positioned to replace incumbent NVM eFLASH, which has hit its limits in terms of speed, power, and scalability.
Arm’s new eMRAM compiler IP gives Samsung’s 28FDS customers the flexibility to scale their memory needs based on the complexity of various use-cases, explains Low. “What drives the cost-effectiveness of this compiler IP is that eMRAM can be integrated with as few as three additional masks, while eFlash requires greater than 12 additional masks at 40nm and below,” he says. “Also, the eMRAM compiler can generate instances to replace Flash, Electrically Erasable Programmable Read-Only Memory (EEPROM) and slow SRAM/data buffer memories with a single non-volatile fast memory – particularly suited for cost- and power- sensitive IoT applications.”
At the SOI Consortium’s 2017 Silicon Valley Symposium, Arm said that they were stepping up their support of FD-SOI (read about that here) – and clearly they are! At that event, Arm VP Ron Moore gave a great presentation, which is freely available on our website: Low Power IP: Essential Ingredients for IoT Opportunities.
Samsung, btw, has been offering 28FDS for about three years now. (ASN did a 3-part interview with Kelvin Low back in 2015 when he was a senior director of marketing for Samsung Foundry. It’s still a useful read – you can get it here.) As of last fall, Samsung said it had taped out more than 40 products for various customers. And at the SOI Consortium’s 2018 Silicon Valley Symposium, Hong Hoa, SVP said they’d already taped out another 20 this year (read about that here).
Samsung says the write speed of their eMRAM is 1000x faster than eFlash. They actually announced the industry’s first eMRAM testchip tape-out milestone on 28FDS in September 2017 (you can read the press release here). They also did an eMRAM test chip with NXP. (BTW, Samsung has a really nice video explaining their eMRAM offering – you can see it above or on YouTube here.)
As noted in ASN’s Silicon Valley 2018 symposium coverage, the basic PDK for the Samsung 18nm FD-SOI process (18FDS) will be available in September 2018, with full production slated for fall of 2019. It will deliver a 24% increase in performance, a 38% decrease in power, and a 35% decrease in area for logic. RF for the 18FDS platform will be ready by the end of this year, and eMRAM beginning in 2019.
Good news: there are far fewer bigoted extremists out there when it comes to FD-SOI vs. FinFETs. People want the best technology for their application. It’s that simple. That’s a key piece of news from the updated survey by Dan Hutcheson, CEO of VLSI Research, which he presented in the afternoon session of the SOI Consortium’s 2018 SOI Symposium in Silicon Valley
The afternoon then featured presentations by foundry partners, which I’ll cover here.
Also in the afternoon were presentations by wafer-maker Simgui, some innovative start-ups leveraging FD-SOI for custom SoCs and the final panel discussion. I’ll cover those in Part 3 of this series.
BTW, if somehow you missed my coverage of the morning sessions about very cool new products and projects from NXP, Sony, Audi, Airbus and Andes Technology, be sure to click here to read it.
The presentations are starting to be posted on the SOI Consortium Events page – but some won’t be. Either way, I’ll cover them here.
A couple years ago at the annual SOI Symposium in Silicon Valley, Dan Hutcheson presented results of a survey he did (ASN covered it – you can still read about it here). At the 2018 event, he presented an update, which is now posted. You can get it here.
The FD-SOI roadmap and IP availability are no longer issues for decision makers, he found. The 14nm branch – do you go FinFET or FD-SOI? – is gone. “Fins and FD are complementary,” he observed. Most people said they’d consider using both and running two roadmaps, choosing whichever technology is appropriate to a given design.
From a transistor viewpoint, the top reasons to choose FD-SOI is that it’s better for analog and has lower leakage/parastics. It’s perceived as better for complex, high mixed-signal SoCs, and especially for RF and sensor integration. In fact, people see RF as the new mixed-signal, wherein FD-SOI is uniquely positioned for 5G and mmWave.
From a business viewpoint, FD-SOI is perceived to have real advantages. In particular, FD-SOI wins when it comes to keeping down design costs, manufacturing costs and time-to-market. IoT is still the hottest target market for FD-SOI, to which he adds high growth expected in automotive and medical.
With 20 tape-outs in 2018, Samsung is seeing an acceleration in its FD-SOI business. “The trend is healthy,” said Hong Hoa, SVP of the company’s foundry business. FD-SOI, he continued, is on a “differentiation path.”
Samsung’s 28nm FD-SOI process, called 28FDS is at full maturity with very strong yields. They’re seeing more customers and a wider range of applications. The design infrastructure, silicon-verified IP and methodologies are also all mature. They have optimal implementation and verification guidelines for body bias design, a body bias memory usage guide, and a body bias generator integration guide. The process supports Grade 1 automotive, and will be qualified for Grade 2 in a few weeks.
FD-SOI, Hoa reminded the audience, offers superior RF performance compared to both planar bulk and 14nm FinFET. The Samsung strategy is to first provide a base for for the FD-SOI process, then add RF and eMRAM. The base for 28nm was done in 2016; they added RF in 2017 and eMRAM this year.
The Samsung platform for IoT applications integrates both RF and eMRAM to support multi-function needs in a single platform. Lead customers are already working with eMRAM in their designs, he added. (BTW, Samsung has a really nice video explaining their eMRAM offering – you can see it on YouTube here.)
The basic PDK for the Samsung 18nm FD-SOI process (18FDS) will be available in September 2018, with full production slated for fall of 2019. It will deliver a 24% increase in performance, a 38% decrease in power, and a 35% decrease in area for logic. RF for the 18FDSplatform will be ready by the end of this year, and eMRAM beginning in 2019.
With design wins from 36 customers underway, 12 of which are taping out in 22FDX (GF’s 22nm FD-SOI process) this year, the market has validated FDX for differentiation, said GF SVP Dr. Bami Bastani. And indeed, designers are using it for a wide array of applications across North America, Europe, Asia/Pacific and Japan.
Customers in the North America are designing in 22FDX for NB-IoT, industrial, RF/analog, mobile, network switches and cryptocurrency applications. In Europe, it’s more or less the same plus automotive/mmWave, optical transmission, wireless BTS and AI/ML. In Asia Pacific/Japan the mix is similar to Europe.
Bastani sees the three big enablers as the the strengths of the roadmap, the ecosystem and multi-sourcing from Dresden and Chengdu (where they’re already equipping the cleanrooms). He also tipped his hat in acknowledgment to the partnership with FD-SOI wafer supplier Soitec, noting that they have gone the extra mile to match GF’s requirements.
So that was the first part of a great afternoon. As mentioned above, my next post (part 3) will cover a very informative presentation by wafer-maker Simgui on the markets in China, plus talks by some innovative start-ups leveraging FD-SOI for custom SoCs and the final panel discussion.