Tag Archive modeling

ByGianni PRATA

To help designers assess 28nm FD-SOI power benefits, Keysight (formerly Agilent/HP test) adds more Leti-UTSOI modeling tech for SPICE

CEA-Leti has signed an agreement with Keysight Technologies (formerly the Agilent/HP test group), the industry-leading device-modeling software supplier, to adopt Leti’s UTSOI extraction flow methodology within Keysight’s device modeling solutions for high-volume SPICE model generation. (Read the press release here.)

“This collaboration between Leti and Keysight will strengthen the global FD-SOI ecosystem by providing an automatic extraction flow for building model cards associated with the Leti-UTSOI models, which are already available in all the major SPICE simulators,” said Marie Semeria, Leti’s CEO. “This professional, automatic extraction-flow solution will address designers’ needs as they weigh FD-SOI’s benefits over competing solutions for the 28nm technology node and below.”

Compact models of transistors and other elementary devices are used to predict the behavior of a design. As such, they are embedded in simulations like SPICE that designers run before actual manufacturing. Power optimization is of course a key component in SOC design. Automatic extraction helps ensure that the power intent specified by the designer in the simulated transistors will really match what will ultimately be seen in silicon.

The simulation of the Leti-UTSOI compact model, which is the first complete compact model dedicated to Ultra-Thin Body and Box and Independent Double Gate MOSFETs (aka FD-SOI), is currently available in Keysight’s modeling and simulation tools. This agreement expands the collaboration to include the extraction flow and will enable device-modeling engineers to efficiently create Leti-UTSOI model cards for use in Process Design Kits (PDKs).

ByGianni PRATA

Newest Leti Compact Model for FD-SOI Further Improves Predictability and Accuracy

TEM cross-section of FDSOI transistor (Courtesy of STMicroelectonics)

TEM cross-section of FDSOI transistor (Courtesy of STMicroelectonics)

CEA-Leti’s newest version of its advanced compact model for FD-SOI is now available in all major SPICE simulators (get the press release here). The Leti-UTSOI2.1 is the latest version of Leti’s compact model for FD-SOI, which was first released in 2013. (Compact models of transistors and other elementary devices are used to predict the behavior of a design. As such, they are embedded in simulations like SPICE that designers run before actual manufacturing. )

Leti-UTSOI2.1 further improves predictability and accuracy. These improvements include a direct and predictive link between bi-dimensional device electrostatics and process parameters, a refined description of narrow-channel effects, improved accuracy of moderate inversion regime and gate tunneling current modeling.

“This new version of the ultra-thin SOI model, which affirms Leti’s continuing leadership in FD-SOI technology, is ideal for designers seeking differentiation in energy management and performance for advanced nodes,” said Leti CEO Marie-Noëlle Semeria

Leti-UTSOI2.1, which considerably extends the domain of physical device description compared to other solutions, is now available in most of the commercial SPICE and Fast SPICE simulators used by industry.

ByGianni PRATA

GF takes multimillion dollar GSS TCAD/EDA license

Gold Standard Simulations Ltd. (GSS) announced a multimillion dollar contract to license its complete TCAD/EDA tool suite to GlobalFoundries (see press release here).  The fully integrated and automated tool chain includes GARAND, the GSS ‘atomistic’ TCAD simulator; Mystic, the GSS statistical compact model extractor; and RandomSpice, the GSS statistical circuit simulator. The GSS tool suite is the world’s only fully integrated tool chain that performs simulation-based Design/Technology Co-Optimisation (DTCO) in advanced bulk, FD-SOI and FinFET technologies, including statistical variability and reliability.

ByAdministrator

Interview: Leti CEO Malier on the FD-SOI Breakthrough; Leti Days in Grenoble (24-26 June) & Semicon West

Some years back, European research giant CEA-Leti made a major commitment to support FD-SOI, partnering with STMicroelectronics, Soitec and IBM.  Now, with the big FD-SOI foundry announcement by Samsung and STMicroelectronics, Leti’s ready to bring its vast expertise to players throughout the value chain, right up through design integration.

To learn more about the range Leti covers, you may also want to check out the “Leti Day” conferences around the world, where they showcase their technology. The next one is in Grenoble (24-26 June, registration site here), followed by an invitation-only event during Semicon West (info here), as well as events in Paris and Tokyo.

ASN recently caught up again with Laurent Malier, CEO of CEA-Leti to get his take on the ST-Samsung news.  (A few months ago, we did an in-depth interview with Malier on the massive role Leti plays in the FD-SOI ecosystem — click here to read it if you missed it then).

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Laurent Malier, CEO of CEA-Leti

Here are some excerpts from our conversation.

Advanced Substrate News (ASN): What does the Samsung-ST announcement mean for Leti?

Laurent Malier (LM): It means the success of our strategy. For years, we’ve been heavily investing in FD-SOI technology, committing critical scientific and technological support at each phase of FD-SOI development. We were very confident that it was the best option for balancing performance, energy efficiency and cost.  In terms of technology and performance, that was very clearly demonstrated last year at CES and in Barcelona. In addition to performance you need to go into manufacturing, secure the ramp-up, secure the costs, and secure the full ecosystem. We worked very hard on all these things over the last year and a half. But the last brick was missing: securing a foundry for the second source and enlarging access to the technology. Now we have it: the ST-Samsung announcement gives us the opportunity to showcase our work and our methodology

 

ASN: In which areas did Leti contribute to FD-SOI development?

LM:  Leti really took a global approach in the development of FD-SOI. Of course, the SOI substrate is based on a Leti invention.  Device research was done by Leti teams with our ecosystem of partners at three different sites, first in Grenoble, and later at Crolles [ST] and Albany [IBM]. We were also active in the modeling (UTSOI models implemented in all EDA tools were developed by Leti) and design kit development, so that a complete design kit was available for designers. We had designers who worked for several years in order to prove the results at the circuit level. And we have several customers for whom we’re deploying the technology in their applications. So from raw material to architecture and application design, we have a global footprint.

Because FD-SOI is an enabling technology, we need to do more than support the “push” – we also need to support the “pull” in exploring applications that will benefit from this technology. This is something else we do. Leti is not only a silicon technology institute but also is focused on applications. Half of our activity looks at application opportunities – especially for telecom, IoT, healthcare, automotives and power management.

 

ASN: Do you see opportunities for FD-SOI in IoT?

LM: For me, the first wave of IoT will be in machine-to-machine [M2M] and process monitoring, so that’s synergistic with sensors. Because your objects are connected, you’ll greatly expand your ability to explore data.  You’ll need more efficient local data processing and more efficient data transmission – so these are places for FD-SOI circuits. For companies that are interested in any part of the value chain – design, sensor integration and so forth – these are areas where we are leaders and can provide expertise.  Look for more announcements coming up at Leti Days.

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